cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rockchip-efuse.yaml (1612B)

      1# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Rockchip eFuse device tree bindings
      8
      9maintainers:
     10  - Heiko Stuebner <heiko@sntech.de>
     11
     12allOf:
     13  - $ref: "nvmem.yaml#"
     14
     15properties:
     16  compatible:
     17    enum:
     18      - rockchip,rk3066a-efuse
     19      - rockchip,rk3188-efuse
     20      - rockchip,rk3228-efuse
     21      - rockchip,rk3288-efuse
     22      - rockchip,rk3328-efuse
     23      - rockchip,rk3368-efuse
     24      - rockchip,rk3399-efuse
     25
     26      # Deprecated: old compatible value for rk3066a, rk3188 and rk3288
     27      - rockchip,rockchip-efuse
     28
     29  reg:
     30    description:
     31      Registers location and eFuse size.
     32    maxItems: 1
     33
     34  clocks:
     35    description:
     36      eFuse clock id.
     37    maxItems: 1
     38
     39  clock-names:
     40    const: pclk_efuse
     41
     42  rockchip,efuse-size:
     43    description:
     44      eFuse size in bytes. The eFuse size in property <reg> will be invalid if
     45      this property is defined.
     46    $ref: /schemas/types.yaml#/definitions/uint32
     47
     48required:
     49  - compatible
     50  - reg
     51  - clocks
     52  - clock-names
     53
     54unevaluatedProperties: false
     55
     56examples:
     57  - |
     58    #include <dt-bindings/clock/rk3288-cru.h>
     59    efuse: efuse@ffb40000 {
     60            compatible = "rockchip,rk3288-efuse";
     61            reg = <0xffb40000 0x20>;
     62            #address-cells = <1>;
     63            #size-cells = <1>;
     64            clocks = <&cru PCLK_EFUSE256>;
     65            clock-names = "pclk_efuse";
     66
     67            /* Data cells */
     68            cpu_leakage: cpu_leakage@17 {
     69                    reg = <0x17 0x1>;
     70            };
     71    };
     72...