cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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opp-v2-qcom-level.yaml (1395B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm OPP bindings to describe OPP nodes.
      8
      9maintainers:
     10  - Niklas Cassel <nks@flawful.org>
     11
     12allOf:
     13  - $ref: opp-v2-base.yaml#
     14
     15properties:
     16  compatible:
     17    const: operating-points-v2-qcom-level
     18
     19patternProperties:
     20  '^opp-?[0-9]+$':
     21    type: object
     22
     23    properties:
     24      opp-level: true
     25
     26      qcom,opp-fuse-level:
     27        description: |
     28          A positive value representing the fuse corner/level associated with
     29          this OPP node. Sometimes several corners/levels shares a certain fuse
     30          corner/level. A fuse corner/level contains e.g. ref uV, min uV,
     31          and max uV.
     32        $ref: /schemas/types.yaml#/definitions/uint32
     33
     34    required:
     35      - opp-level
     36      - qcom,opp-fuse-level
     37
     38required:
     39  - compatible
     40
     41additionalProperties: false
     42
     43examples:
     44  - |
     45    cpr_opp_table: opp-table-cpr {
     46        compatible = "operating-points-v2-qcom-level";
     47
     48        cpr_opp1: opp1 {
     49            opp-level = <1>;
     50            qcom,opp-fuse-level = <1>;
     51        };
     52        cpr_opp2: opp2 {
     53            opp-level = <2>;
     54            qcom,opp-fuse-level = <2>;
     55        };
     56        cpr_opp3: opp3 {
     57            opp-level = <3>;
     58            qcom,opp-fuse-level = <3>;
     59        };
     60    };