cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,pcie.yaml (20254B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm PCI express root complex
      8
      9maintainers:
     10  - Bjorn Andersson <bjorn.andersson@linaro.org>
     11  - Stanimir Varbanov <svarbanov@mm-sol.com>
     12
     13description: |
     14  Qualcomm PCIe root complex controller is bansed on the Synopsys DesignWare
     15  PCIe IP.
     16
     17properties:
     18  compatible:
     19    enum:
     20      - qcom,pcie-ipq8064
     21      - qcom,pcie-ipq8064-v2
     22      - qcom,pcie-apq8064
     23      - qcom,pcie-apq8084
     24      - qcom,pcie-msm8996
     25      - qcom,pcie-ipq4019
     26      - qcom,pcie-ipq8074
     27      - qcom,pcie-qcs404
     28      - qcom,pcie-sc7280
     29      - qcom,pcie-sc8180x
     30      - qcom,pcie-sdm845
     31      - qcom,pcie-sm8150
     32      - qcom,pcie-sm8250
     33      - qcom,pcie-sm8450-pcie0
     34      - qcom,pcie-sm8450-pcie1
     35      - qcom,pcie-ipq6018
     36
     37  reg:
     38    minItems: 4
     39    maxItems: 5
     40
     41  reg-names:
     42    minItems: 4
     43    maxItems: 5
     44
     45  interrupts:
     46    maxItems: 1
     47
     48  interrupt-names:
     49    items:
     50      - const: msi
     51
     52  # Common definitions for clocks, clock-names and reset.
     53  # Platform constraints are described later.
     54  clocks:
     55    minItems: 3
     56    maxItems: 12
     57
     58  clock-names:
     59    minItems: 3
     60    maxItems: 12
     61
     62  resets:
     63    minItems: 1
     64    maxItems: 12
     65
     66  resets-names:
     67    minItems: 1
     68    maxItems: 12
     69
     70  vdda-supply:
     71    description: A phandle to the core analog power supply
     72
     73  vdda_phy-supply:
     74    description: A phandle to the core analog power supply for PHY
     75
     76  vdda_refclk-supply:
     77    description: A phandle to the core analog power supply for IC which generates reference clock
     78
     79  vddpe-3v3-supply:
     80    description: A phandle to the PCIe endpoint power supply
     81
     82  phys:
     83    maxItems: 1
     84
     85  phy-names:
     86    items:
     87      - const: pciephy
     88
     89  power-domains:
     90    maxItems: 1
     91
     92  perst-gpios:
     93    description: GPIO controlled connection to PERST# signal
     94    maxItems: 1
     95
     96  wake-gpios:
     97    description: GPIO controlled connection to WAKE# signal
     98    maxItems: 1
     99
    100required:
    101  - compatible
    102  - reg
    103  - reg-names
    104  - interrupts
    105  - interrupt-names
    106  - "#interrupt-cells"
    107  - interrupt-map-mask
    108  - interrupt-map
    109  - clocks
    110  - clock-names
    111
    112allOf:
    113  - $ref: /schemas/pci/pci-bus.yaml#
    114  - if:
    115      properties:
    116        compatible:
    117          contains:
    118            enum:
    119              - qcom,pcie-apq8064
    120              - qcom,pcie-ipq4019
    121              - qcom,pcie-ipq8064
    122              - qcom,pcie-ipq8064v2
    123              - qcom,pcie-ipq8074
    124              - qcom,pcie-qcs404
    125    then:
    126      properties:
    127        reg:
    128          minItems: 4
    129          maxItems: 4
    130        reg-names:
    131          items:
    132            - const: dbi # DesignWare PCIe registers
    133            - const: elbi # External local bus interface registers
    134            - const: parf # Qualcomm specific registers
    135            - const: config # PCIe configuration space
    136
    137  - if:
    138      properties:
    139        compatible:
    140          contains:
    141            enum:
    142              - qcom,pcie-ipq6018
    143    then:
    144      properties:
    145        reg:
    146          minItems: 5
    147          maxItems: 5
    148        reg-names:
    149          items:
    150            - const: dbi # DesignWare PCIe registers
    151            - const: elbi # External local bus interface registers
    152            - const: atu # ATU address space
    153            - const: parf # Qualcomm specific registers
    154            - const: config # PCIe configuration space
    155
    156  - if:
    157      properties:
    158        compatible:
    159          contains:
    160            enum:
    161              - qcom,pcie-apq8084
    162              - qcom,pcie-msm8996
    163              - qcom,pcie-sdm845
    164    then:
    165      properties:
    166        reg:
    167          minItems: 4
    168          maxItems: 4
    169        reg-names:
    170          items:
    171            - const: parf # Qualcomm specific registers
    172            - const: dbi # DesignWare PCIe registers
    173            - const: elbi # External local bus interface registers
    174            - const: config # PCIe configuration space
    175
    176  - if:
    177      properties:
    178        compatible:
    179          contains:
    180            enum:
    181              - qcom,pcie-sc7280
    182              - qcom,pcie-sc8180x
    183              - qcom,pcie-sm8250
    184              - qcom,pcie-sm8450-pcie0
    185              - qcom,pcie-sm8450-pcie1
    186    then:
    187      properties:
    188        reg:
    189          minItems: 5
    190          maxItems: 5
    191        reg-names:
    192          items:
    193            - const: parf # Qualcomm specific registers
    194            - const: dbi # DesignWare PCIe registers
    195            - const: elbi # External local bus interface registers
    196            - const: atu # ATU address space
    197            - const: config # PCIe configuration space
    198
    199  - if:
    200      properties:
    201        compatible:
    202          contains:
    203            enum:
    204              - qcom,pcie-apq8064
    205              - qcom,pcie-ipq8064
    206              - qcom,pcie-ipq8064v2
    207    then:
    208      properties:
    209        clocks:
    210          minItems: 3
    211          maxItems: 5
    212        clock-names:
    213          minItems: 3
    214          items:
    215            - const: core # Clocks the pcie hw block
    216            - const: iface # Configuration AHB clock
    217            - const: phy # Clocks the pcie PHY block
    218            - const: aux # Clocks the pcie AUX block, not on apq8064
    219            - const: ref # Clocks the pcie ref block, not on apq8064
    220        resets:
    221          minItems: 5
    222          maxItems: 6
    223        reset-names:
    224          minItems: 5
    225          items:
    226            - const: axi # AXI reset
    227            - const: ahb # AHB reset
    228            - const: por # POR reset
    229            - const: pci # PCI reset
    230            - const: phy # PHY reset
    231            - const: ext # EXT reset, not on apq8064
    232      required:
    233        - vdda-supply
    234        - vdda_phy-supply
    235        - vdda_refclk-supply
    236
    237  - if:
    238      properties:
    239        compatible:
    240          contains:
    241            enum:
    242              - qcom,pcie-apq8084
    243    then:
    244      properties:
    245        clocks:
    246          minItems: 4
    247          maxItems: 4
    248        clock-names:
    249          items:
    250            - const: iface # Configuration AHB clock
    251            - const: master_bus # Master AXI clock
    252            - const: slave_bus # Slave AXI clock
    253            - const: aux # Auxiliary (AUX) clock
    254        resets:
    255          maxItems: 1
    256        reset-names:
    257          items:
    258            - const: core # Core reset
    259
    260  - if:
    261      properties:
    262        compatible:
    263          contains:
    264            enum:
    265              - qcom,pcie-ipq4019
    266    then:
    267      properties:
    268        clocks:
    269          minItems: 3
    270          maxItems: 3
    271        clock-names:
    272          items:
    273            - const: aux # Auxiliary (AUX) clock
    274            - const: master_bus # Master AXI clock
    275            - const: slave_bus # Slave AXI clock
    276        resets:
    277          minItems: 12
    278          maxItems: 12
    279        reset-names:
    280          items:
    281            - const: axi_m # AXI master reset
    282            - const: axi_s # AXI slave reset
    283            - const: pipe # PIPE reset
    284            - const: axi_m_vmid # VMID reset
    285            - const: axi_s_xpu # XPU reset
    286            - const: parf # PARF reset
    287            - const: phy # PHY reset
    288            - const: axi_m_sticky # AXI sticky reset
    289            - const: pipe_sticky # PIPE sticky reset
    290            - const: pwr # PWR reset
    291            - const: ahb # AHB reset
    292            - const: phy_ahb # PHY AHB reset
    293
    294  - if:
    295      properties:
    296        compatible:
    297          contains:
    298            enum:
    299              - qcom,pcie-msm8996
    300    then:
    301      oneOf:
    302        - properties:
    303            clock-names:
    304              items:
    305                - const: pipe # Pipe Clock driving internal logic
    306                - const: aux # Auxiliary (AUX) clock
    307                - const: cfg # Configuration clock
    308                - const: bus_master # Master AXI clock
    309                - const: bus_slave # Slave AXI clock
    310        - properties:
    311            clock-names:
    312              items:
    313                - const: pipe # Pipe Clock driving internal logic
    314                - const: bus_master # Master AXI clock
    315                - const: bus_slave # Slave AXI clock
    316                - const: cfg # Configuration clock
    317                - const: aux # Auxiliary (AUX) clock
    318      properties:
    319        clocks:
    320          minItems: 5
    321          maxItems: 5
    322        resets: false
    323        reset-names: false
    324
    325  - if:
    326      properties:
    327        compatible:
    328          contains:
    329            enum:
    330              - qcom,pcie-ipq8074
    331    then:
    332      properties:
    333        clocks:
    334          minItems: 5
    335          maxItems: 5
    336        clock-names:
    337          items:
    338            - const: iface # PCIe to SysNOC BIU clock
    339            - const: axi_m # AXI Master clock
    340            - const: axi_s # AXI Slave clock
    341            - const: ahb # AHB clock
    342            - const: aux # Auxiliary clock
    343        resets:
    344          minItems: 7
    345          maxItems: 7
    346        reset-names:
    347          items:
    348            - const: pipe # PIPE reset
    349            - const: sleep # Sleep reset
    350            - const: sticky # Core Sticky reset
    351            - const: axi_m # AXI Master reset
    352            - const: axi_s # AXI Slave reset
    353            - const: ahb # AHB Reset
    354            - const: axi_m_sticky # AXI Master Sticky reset
    355
    356  - if:
    357      properties:
    358        compatible:
    359          contains:
    360            enum:
    361              - qcom,pcie-ipq6018
    362    then:
    363      properties:
    364        clocks:
    365          minItems: 5
    366          maxItems: 5
    367        clock-names:
    368          items:
    369            - const: iface # PCIe to SysNOC BIU clock
    370            - const: axi_m # AXI Master clock
    371            - const: axi_s # AXI Slave clock
    372            - const: axi_bridge # AXI bridge clock
    373            - const: rchng
    374        resets:
    375          minItems: 8
    376          maxItems: 8
    377        reset-names:
    378          items:
    379            - const: pipe # PIPE reset
    380            - const: sleep # Sleep reset
    381            - const: sticky # Core Sticky reset
    382            - const: axi_m # AXI Master reset
    383            - const: axi_s # AXI Slave reset
    384            - const: ahb # AHB Reset
    385            - const: axi_m_sticky # AXI Master Sticky reset
    386            - const: axi_s_sticky # AXI Slave Sticky reset
    387
    388  - if:
    389      properties:
    390        compatible:
    391          contains:
    392            enum:
    393              - qcom,pcie-qcs404
    394    then:
    395      properties:
    396        clocks:
    397          minItems: 4
    398          maxItems: 4
    399        clock-names:
    400          items:
    401            - const: iface # AHB clock
    402            - const: aux # Auxiliary clock
    403            - const: master_bus # AXI Master clock
    404            - const: slave_bus # AXI Slave clock
    405        resets:
    406          minItems: 6
    407          maxItems: 6
    408        reset-names:
    409          items:
    410            - const: axi_m # AXI Master reset
    411            - const: axi_s # AXI Slave reset
    412            - const: axi_m_sticky # AXI Master Sticky reset
    413            - const: pipe_sticky # PIPE sticky reset
    414            - const: pwr # PWR reset
    415            - const: ahb # AHB reset
    416
    417  - if:
    418      properties:
    419        compatible:
    420          contains:
    421            enum:
    422              - qcom,pcie-sc7280
    423    then:
    424      properties:
    425        clocks:
    426          minItems: 11
    427          maxItems: 11
    428        clock-names:
    429          items:
    430            - const: pipe # PIPE clock
    431            - const: pipe_mux # PIPE MUX
    432            - const: phy_pipe # PIPE output clock
    433            - const: ref # REFERENCE clock
    434            - const: aux # Auxiliary clock
    435            - const: cfg # Configuration clock
    436            - const: bus_master # Master AXI clock
    437            - const: bus_slave # Slave AXI clock
    438            - const: slave_q2a # Slave Q2A clock
    439            - const: tbu # PCIe TBU clock
    440            - const: ddrss_sf_tbu # PCIe SF TBU clock
    441        resets:
    442          maxItems: 1
    443        reset-names:
    444          items:
    445            - const: pci # PCIe core reset
    446
    447  - if:
    448      properties:
    449        compatible:
    450          contains:
    451            enum:
    452              - qcom,pcie-sdm845
    453    then:
    454      oneOf:
    455          # Unfortunately the "optional" ref clock is used in the middle of the list
    456        - properties:
    457            clocks:
    458              minItems: 8
    459              maxItems: 8
    460            clock-names:
    461              items:
    462                - const: pipe # PIPE clock
    463                - const: aux # Auxiliary clock
    464                - const: cfg # Configuration clock
    465                - const: bus_master # Master AXI clock
    466                - const: bus_slave # Slave AXI clock
    467                - const: slave_q2a # Slave Q2A clock
    468                - const: ref # REFERENCE clock
    469                - const: tbu # PCIe TBU clock
    470        - properties:
    471            clocks:
    472              minItems: 7
    473              maxItems: 7
    474            clock-names:
    475              items:
    476                - const: pipe # PIPE clock
    477                - const: aux # Auxiliary clock
    478                - const: cfg # Configuration clock
    479                - const: bus_master # Master AXI clock
    480                - const: bus_slave # Slave AXI clock
    481                - const: slave_q2a # Slave Q2A clock
    482                - const: tbu # PCIe TBU clock
    483      properties:
    484        resets:
    485          maxItems: 1
    486        reset-names:
    487          items:
    488            - const: pci # PCIe core reset
    489
    490  - if:
    491      properties:
    492        compatible:
    493          contains:
    494            enum:
    495              - qcom,pcie-sc8180x
    496              - qcom,pcie-sm8150
    497              - qcom,pcie-sm8250
    498    then:
    499      oneOf:
    500          # Unfortunately the "optional" ref clock is used in the middle of the list
    501        - properties:
    502            clocks:
    503              minItems: 9
    504              maxItems: 9
    505            clock-names:
    506              items:
    507                - const: pipe # PIPE clock
    508                - const: aux # Auxiliary clock
    509                - const: cfg # Configuration clock
    510                - const: bus_master # Master AXI clock
    511                - const: bus_slave # Slave AXI clock
    512                - const: slave_q2a # Slave Q2A clock
    513                - const: ref # REFERENCE clock
    514                - const: tbu # PCIe TBU clock
    515                - const: ddrss_sf_tbu # PCIe SF TBU clock
    516        - properties:
    517            clocks:
    518              minItems: 8
    519              maxItems: 8
    520            clock-names:
    521              items:
    522                - const: pipe # PIPE clock
    523                - const: aux # Auxiliary clock
    524                - const: cfg # Configuration clock
    525                - const: bus_master # Master AXI clock
    526                - const: bus_slave # Slave AXI clock
    527                - const: slave_q2a # Slave Q2A clock
    528                - const: tbu # PCIe TBU clock
    529                - const: ddrss_sf_tbu # PCIe SF TBU clock
    530      properties:
    531        resets:
    532          maxItems: 1
    533        reset-names:
    534          items:
    535            - const: pci # PCIe core reset
    536
    537  - if:
    538      properties:
    539        compatible:
    540          contains:
    541            enum:
    542              - qcom,pcie-sm8450-pcie0
    543    then:
    544      properties:
    545        clocks:
    546          minItems: 12
    547          maxItems: 12
    548        clock-names:
    549          items:
    550            - const: pipe # PIPE clock
    551            - const: pipe_mux # PIPE MUX
    552            - const: phy_pipe # PIPE output clock
    553            - const: ref # REFERENCE clock
    554            - const: aux # Auxiliary clock
    555            - const: cfg # Configuration clock
    556            - const: bus_master # Master AXI clock
    557            - const: bus_slave # Slave AXI clock
    558            - const: slave_q2a # Slave Q2A clock
    559            - const: ddrss_sf_tbu # PCIe SF TBU clock
    560            - const: aggre0 # Aggre NoC PCIe0 AXI clock
    561            - const: aggre1 # Aggre NoC PCIe1 AXI clock
    562        resets:
    563          maxItems: 1
    564        reset-names:
    565          items:
    566            - const: pci # PCIe core reset
    567
    568  - if:
    569      properties:
    570        compatible:
    571          contains:
    572            enum:
    573              - qcom,pcie-sm8450-pcie1
    574    then:
    575      properties:
    576        clocks:
    577          minItems: 11
    578          maxItems: 11
    579        clock-names:
    580          items:
    581            - const: pipe # PIPE clock
    582            - const: pipe_mux # PIPE MUX
    583            - const: phy_pipe # PIPE output clock
    584            - const: ref # REFERENCE clock
    585            - const: aux # Auxiliary clock
    586            - const: cfg # Configuration clock
    587            - const: bus_master # Master AXI clock
    588            - const: bus_slave # Slave AXI clock
    589            - const: slave_q2a # Slave Q2A clock
    590            - const: ddrss_sf_tbu # PCIe SF TBU clock
    591            - const: aggre1 # Aggre NoC PCIe1 AXI clock
    592        resets:
    593          maxItems: 1
    594        reset-names:
    595          items:
    596            - const: pci # PCIe core reset
    597
    598  - if:
    599      not:
    600        properties:
    601          compatible:
    602            contains:
    603              enum:
    604                - qcom,pcie-apq8064
    605                - qcom,pcie-ipq4019
    606                - qcom,pcie-ipq8064
    607                - qcom,pcie-ipq8064v2
    608                - qcom,pcie-ipq8074
    609                - qcom,pcie-qcs404
    610    then:
    611      required:
    612        - power-domains
    613
    614  - if:
    615      not:
    616        properties:
    617          compatibles:
    618            contains:
    619              enum:
    620                - qcom,pcie-msm8996
    621    then:
    622      required:
    623        - resets
    624        - reset-names
    625
    626unevaluatedProperties: false
    627
    628examples:
    629  - |
    630    #include <dt-bindings/interrupt-controller/arm-gic.h>
    631    pcie@1b500000 {
    632      compatible = "qcom,pcie-ipq8064";
    633      reg = <0x1b500000 0x1000>,
    634            <0x1b502000 0x80>,
    635            <0x1b600000 0x100>,
    636            <0x0ff00000 0x100000>;
    637      reg-names = "dbi", "elbi", "parf", "config";
    638      device_type = "pci";
    639      linux,pci-domain = <0>;
    640      bus-range = <0x00 0xff>;
    641      num-lanes = <1>;
    642      #address-cells = <3>;
    643      #size-cells = <2>;
    644      ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
    645               <0x82000000 0 0 0x08000000 0 0x07e00000>;
    646      interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
    647      interrupt-names = "msi";
    648      #interrupt-cells = <1>;
    649      interrupt-map-mask = <0 0 0 0x7>;
    650      interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
    651                      <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
    652                      <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
    653                      <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
    654      clocks = <&gcc 41>,
    655               <&gcc 43>,
    656               <&gcc 44>,
    657               <&gcc 42>,
    658               <&gcc 248>;
    659      clock-names = "core", "iface", "phy", "aux", "ref";
    660      resets = <&gcc 27>,
    661               <&gcc 26>,
    662               <&gcc 25>,
    663               <&gcc 24>,
    664               <&gcc 23>,
    665               <&gcc 22>;
    666      reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
    667      pinctrl-0 = <&pcie_pins_default>;
    668      pinctrl-names = "default";
    669      vdda-supply = <&pm8921_s3>;
    670      vdda_phy-supply = <&pm8921_lvs6>;
    671      vdda_refclk-supply = <&ext_3p3v>;
    672    };
    673  - |
    674    #include <dt-bindings/interrupt-controller/arm-gic.h>
    675    #include <dt-bindings/gpio/gpio.h>
    676    pcie@fc520000 {
    677      compatible = "qcom,pcie-apq8084";
    678      reg = <0xfc520000 0x2000>,
    679            <0xff000000 0x1000>,
    680            <0xff001000 0x1000>,
    681            <0xff002000 0x2000>;
    682      reg-names = "parf", "dbi", "elbi", "config";
    683      device_type = "pci";
    684      linux,pci-domain = <0>;
    685      bus-range = <0x00 0xff>;
    686      num-lanes = <1>;
    687      #address-cells = <3>;
    688      #size-cells = <2>;
    689      ranges = <0x81000000 0 0          0xff200000 0 0x00100000>,
    690               <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;
    691      interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
    692      interrupt-names = "msi";
    693      #interrupt-cells = <1>;
    694      interrupt-map-mask = <0 0 0 0x7>;
    695      interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
    696                      <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
    697                      <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
    698                      <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
    699      clocks = <&gcc 324>,
    700               <&gcc 325>,
    701               <&gcc 327>,
    702               <&gcc 323>;
    703      clock-names = "iface", "master_bus", "slave_bus", "aux";
    704      resets = <&gcc 81>;
    705      reset-names = "core";
    706      power-domains = <&gcc 1>;
    707      vdda-supply = <&pma8084_l3>;
    708      phys = <&pciephy0>;
    709      phy-names = "pciephy";
    710      perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
    711      pinctrl-0 = <&pcie0_pins_default>;
    712      pinctrl-names = "default";
    713    };
    714...