cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spe-pmu.yaml (1088B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/perf/spe-pmu.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
      8
      9maintainers:
     10  - Will Deacon <will@kernel.org>
     11
     12description:
     13  ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
     14  performance sample data using an in-memory trace buffer.
     15
     16properties:
     17  compatible:
     18    const: arm,statistical-profiling-extension-v1
     19
     20  interrupts:
     21    maxItems: 1
     22    description: |
     23      The PPI to signal SPE events. For heterogeneous systems where SPE is only
     24      supported on a subset of the CPUs, please consult the arm,gic-v3 binding
     25      for details on describing a PPI partition.
     26
     27additionalProperties: false
     28
     29required:
     30  - compatible
     31  - interrupts
     32
     33examples:
     34  - |
     35    #include <dt-bindings/interrupt-controller/arm-gic.h>
     36
     37    spe-pmu {
     38        compatible = "arm,statistical-profiling-extension-v1";
     39        interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
     40    };