cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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allwinner,sun8i-a23-usb-phy.yaml (2416B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Allwinner A23 USB PHY Device Tree Bindings
      8
      9maintainers:
     10  - Chen-Yu Tsai <wens@csie.org>
     11  - Maxime Ripard <mripard@kernel.org>
     12
     13properties:
     14  "#phy-cells":
     15    const: 1
     16
     17  compatible:
     18    enum:
     19      - allwinner,sun8i-a23-usb-phy
     20      - allwinner,sun8i-a33-usb-phy
     21
     22  reg:
     23    items:
     24      - description: PHY Control registers
     25      - description: PHY PMU1 registers
     26
     27  reg-names:
     28    items:
     29      - const: phy_ctrl
     30      - const: pmu1
     31
     32  clocks:
     33    items:
     34      - description: USB OTG PHY bus clock
     35      - description: USB Host 0 PHY bus clock
     36
     37  clock-names:
     38    items:
     39      - const: usb0_phy
     40      - const: usb1_phy
     41
     42  resets:
     43    items:
     44      - description: USB OTG reset
     45      - description: USB Host 1 Controller reset
     46
     47  reset-names:
     48    items:
     49      - const: usb0_reset
     50      - const: usb1_reset
     51
     52  usb0_id_det-gpios:
     53    maxItems: 1
     54    description: GPIO to the USB OTG ID pin
     55
     56  usb0_vbus_det-gpios:
     57    maxItems: 1
     58    description: GPIO to the USB OTG VBUS detect pin
     59
     60  usb0_vbus_power-supply:
     61    description: Power supply to detect the USB OTG VBUS
     62
     63  usb0_vbus-supply:
     64    description: Regulator controlling USB OTG VBUS
     65
     66  usb1_vbus-supply:
     67    description: Regulator controlling USB1 Host controller
     68
     69required:
     70  - "#phy-cells"
     71  - compatible
     72  - clocks
     73  - clock-names
     74  - reg
     75  - reg-names
     76  - resets
     77  - reset-names
     78
     79additionalProperties: false
     80
     81examples:
     82  - |
     83    #include <dt-bindings/gpio/gpio.h>
     84    #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
     85    #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
     86
     87    phy@1c19400 {
     88        #phy-cells = <1>;
     89        compatible = "allwinner,sun8i-a23-usb-phy";
     90        reg = <0x01c19400 0x10>, <0x01c1a800 0x4>;
     91        reg-names = "phy_ctrl", "pmu1";
     92        clocks = <&ccu CLK_USB_PHY0>,
     93                 <&ccu CLK_USB_PHY1>;
     94        clock-names = "usb0_phy",
     95                      "usb1_phy";
     96        resets = <&ccu RST_USB_PHY0>,
     97                 <&ccu RST_USB_PHY1>;
     98        reset-names = "usb0_reset",
     99                      "usb1_reset";
    100        usb0_id_det-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
    101        usb0_vbus_power-supply = <&usb_power_supply>;
    102        usb0_vbus-supply = <&reg_drivevbus>;
    103        usb1_vbus-supply = <&reg_usb1_vbus>;
    104    };