brcm,cygnus-pcie-phy.yaml (1366B)
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/brcm,cygnus-pcie-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Broadcom Cygnus PCIe PHY 8 9maintainers: 10 - Ray Jui <ray.jui@broadcom.com> 11 - Scott Branden <scott.branden@broadcom.com> 12 13properties: 14 $nodename: 15 pattern: "^pcie[-|_]phy(@.*)?$" 16 17 compatible: 18 items: 19 - const: brcm,cygnus-pcie-phy 20 21 reg: 22 maxItems: 1 23 description: > 24 Base address and length of the PCIe PHY block 25 26 "#address-cells": 27 const: 1 28 29 "#size-cells": 30 const: 0 31 32patternProperties: 33 "^pcie-phy@[0-9]+$": 34 type: object 35 description: > 36 PCIe PHY child nodes 37 38 properties: 39 reg: 40 maxItems: 1 41 description: > 42 The PCIe PHY port number 43 44 "#phy-cells": 45 const: 0 46 47 required: 48 - reg 49 - "#phy-cells" 50 51required: 52 - compatible 53 - reg 54 - "#address-cells" 55 - "#size-cells" 56 57additionalProperties: false 58 59examples: 60 - | 61 pcie_phy: pcie_phy@301d0a0 { 62 compatible = "brcm,cygnus-pcie-phy"; 63 reg = <0x0301d0a0 0x14>; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 pcie0_phy: pcie-phy@0 { 68 reg = <0>; 69 #phy-cells = <0>; 70 }; 71 72 pcie1_phy: pcie-phy@1 { 73 reg = <1>; 74 #phy-cells = <0>; 75 }; 76 };