cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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calxeda-combophy.yaml (1229B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Calxeda Highbank Combination PHYs binding for SATA
      8
      9description: |
     10  The Calxeda Combination PHYs connect the SoC to the internal fabric
     11  and to SATA connectors. The PHYs support multiple protocols (SATA,
     12  SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
     13  controller).
     14  Programming the PHYs is typically handled by those device drivers,
     15  not by a dedicated PHY driver.
     16
     17maintainers:
     18  - Andre Przywara <andre.przywara@arm.com>
     19
     20properties:
     21  compatible:
     22    const: calxeda,hb-combophy
     23
     24  '#phy-cells':
     25    const: 1
     26
     27  reg:
     28    maxItems: 1
     29
     30  phydev:
     31    description: device ID for programming the ComboPHY.
     32    $ref: /schemas/types.yaml#/definitions/uint32
     33    maximum: 31
     34
     35required:
     36  - compatible
     37  - reg
     38  - phydev
     39  - '#phy-cells'
     40
     41additionalProperties: false
     42
     43examples:
     44  - |
     45    combophy5: combo-phy@fff5d000 {
     46                   compatible = "calxeda,hb-combophy";
     47                   #phy-cells = <1>;
     48                   reg = <0xfff5d000 0x1000>;
     49                   phydev = <31>;
     50               };