cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cdns,dphy.yaml (1048B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Cadence DPHY Device Tree Bindings
      8
      9maintainers:
     10  - Pratyush Yadav <p.yadav@ti.com>
     11
     12properties:
     13  compatible:
     14    items:
     15      - const: cdns,dphy
     16
     17  reg:
     18    maxItems: 1
     19
     20  clocks:
     21    items:
     22      - description: PMA state machine clock
     23      - description: PLL reference clock
     24
     25  clock-names:
     26    items:
     27      - const: psm
     28      - const: pll_ref
     29
     30  "#phy-cells":
     31    const: 0
     32
     33  power-domains:
     34    maxItems: 1
     35
     36required:
     37  - compatible
     38  - reg
     39  - clocks
     40  - clock-names
     41  - "#phy-cells"
     42
     43additionalProperties: false
     44
     45examples:
     46  - |
     47    #include <dt-bindings/soc/ti,sci_pm_domain.h>
     48
     49    dphy0: phy@fd0e0000{
     50        compatible = "cdns,dphy";
     51        reg = <0xfd0e0000 0x1000>;
     52        clocks = <&psm_clk>, <&pll_ref_clk>;
     53        clock-names = "psm", "pll_ref";
     54        power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
     55        #phy-cells = <0>;
     56    };