cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,imx8mq-usb-phy.yaml (964B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Freescale i.MX8MQ USB3 PHY binding
      8
      9maintainers:
     10  - Li Jun <jun.li@nxp.com>
     11
     12properties:
     13  compatible:
     14    enum:
     15      - fsl,imx8mq-usb-phy
     16      - fsl,imx8mp-usb-phy
     17
     18  reg:
     19    maxItems: 1
     20
     21  "#phy-cells":
     22    const: 0
     23
     24  clocks:
     25    maxItems: 1
     26
     27  clock-names:
     28    items:
     29      - const: phy
     30
     31  vbus-supply:
     32    description:
     33      A phandle to the regulator for USB VBUS.
     34
     35required:
     36  - compatible
     37  - reg
     38  - "#phy-cells"
     39  - clocks
     40  - clock-names
     41
     42additionalProperties: false
     43
     44examples:
     45  - |
     46    #include <dt-bindings/clock/imx8mq-clock.h>
     47    usb3_phy0: phy@381f0040 {
     48        compatible = "fsl,imx8mq-usb-phy";
     49        reg = <0x381f0040 0x40>;
     50        clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>;
     51        clock-names = "phy";
     52        #phy-cells = <0>;
     53    };