cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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microchip,sparx5-serdes.yaml (2443B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Microchip Sparx5 Serdes controller
      8
      9maintainers:
     10  - Steen Hegelund <steen.hegelund@microchip.com>
     11
     12description: |
     13  The Sparx5 SERDES interfaces share the same basic functionality, but
     14  support different operating modes and line rates.
     15
     16  The following list lists the SERDES features:
     17
     18  * RX Adaptive Decision Feedback Equalizer (DFE)
     19  * Programmable continuous time linear equalizer (CTLE)
     20  * Rx variable gain control
     21  * Rx built-in fault detector (loss-of-lock/loss-of-signal)
     22  * Adjustable tx de-emphasis (FFE)
     23  * Tx output amplitude control
     24  * Supports rx eye monitor
     25  * Multiple loopback modes
     26  * Prbs generator and checker
     27  * Polarity inversion control
     28
     29  SERDES6G:
     30
     31  The SERDES6G is a high-speed SERDES interface, which can operate at
     32  the following data rates:
     33
     34  * 100 Mbps (100BASE-FX)
     35  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
     36  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
     37  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
     38
     39  SERDES10G
     40
     41  The SERDES10G is a high-speed SERDES interface, which can operate at
     42  the following data rates:
     43
     44  * 100 Mbps (100BASE-FX)
     45  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
     46  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
     47  * 5 Gbps (QSGMII/USGMII)
     48  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
     49  * 10 Gbps (10G-USGMII)
     50  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
     51
     52  SERDES25G
     53
     54  The SERDES25G is a high-speed SERDES interface, which can operate at
     55  the following data rates:
     56
     57  * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
     58  * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
     59  * 5 Gbps (QSGMII/USGMII)
     60  * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
     61  * 10 Gbps (10G-USGMII)
     62  * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
     63  * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
     64
     65properties:
     66  $nodename:
     67    pattern: "^serdes@[0-9a-f]+$"
     68
     69  compatible:
     70    const: microchip,sparx5-serdes
     71
     72  reg:
     73    minItems: 1
     74
     75  '#phy-cells':
     76    const: 1
     77    description: |
     78      - The main serdes input port
     79
     80  clocks:
     81    maxItems: 1
     82
     83required:
     84  - compatible
     85  - reg
     86  - '#phy-cells'
     87  - clocks
     88
     89additionalProperties: false
     90
     91examples:
     92  - |
     93    serdes: serdes@10808000 {
     94      compatible = "microchip,sparx5-serdes";
     95      #phy-cells = <1>;
     96      clocks = <&sys_clk>;
     97      reg = <0x10808000 0x5d0000>;
     98    };
     99
    100...