cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mxs-usb-phy.txt (1277B)


      1* Freescale MXS USB Phy Device
      2
      3Required properties:
      4- compatible: should contain:
      5	* "fsl,imx23-usbphy" for imx23 and imx28
      6	* "fsl,imx6q-usbphy" for imx6dq and imx6dl
      7	* "fsl,imx6sl-usbphy" for imx6sl
      8	* "fsl,vf610-usbphy" for Vybrid vf610
      9	* "fsl,imx6sx-usbphy" for imx6sx
     10	* "fsl,imx7ulp-usbphy" for imx7ulp
     11  "fsl,imx23-usbphy" is still a fallback for other strings
     12- reg: Should contain registers location and length
     13- interrupts: Should contain phy interrupt
     14- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
     15
     16Optional properties:
     17- fsl,tx-cal-45-dn-ohms: Integer [30-55]. Resistance (in ohms) of switchable
     18  high-speed trimming resistor connected in parallel with the 45 ohm resistor
     19  that terminates the DN output signal. Default: 45
     20- fsl,tx-cal-45-dp-ohms: Integer [30-55]. Resistance (in ohms) of switchable
     21  high-speed trimming resistor connected in parallel with the 45 ohm resistor
     22  that terminates the DP output signal. Default: 45
     23- fsl,tx-d-cal: Integer [79-119]. Current trimming value (as a percentage) of
     24  the 17.78mA TX reference current. Default: 100
     25
     26Example:
     27usbphy1: usb-phy@20c9000 {
     28	compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
     29	reg = <0x020c9000 0x1000>;
     30	interrupts = <0 44 0x04>;
     31	fsl,anatop = <&anatop>;
     32};