cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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phy-mvebu.txt (1179B)


      1* Marvell MVEBU SATA PHY
      2
      3Power control for the SATA phy found on Marvell MVEBU SoCs.
      4
      5This document extends the binding described in phy-bindings.txt
      6
      7Required properties :
      8
      9 - reg		   : Offset and length of the register set for the SATA device
     10 - compatible	   : Should be "marvell,mvebu-sata-phy"
     11 - clocks	   : phandle of clock and specifier that supplies the device
     12 - clock-names	   : Should be "sata"
     13
     14Example:
     15		sata-phy@84000 {
     16			compatible = "marvell,mvebu-sata-phy";
     17			reg = <0x84000 0x0334>;
     18			clocks = <&gate_clk 15>;
     19			clock-names = "sata";
     20			#phy-cells = <0>;
     21		};
     22
     23Armada 375 USB cluster
     24----------------------
     25
     26Armada 375 comes with an USB2 host and device controller and an USB3
     27controller. The USB cluster control register allows to manage common
     28features of both USB controllers.
     29
     30Required properties:
     31
     32- compatible: "marvell,armada-375-usb-cluster"
     33- reg: Should contain usb cluster register location and length.
     34- #phy-cells : from the generic phy bindings, must be 1. Possible
     35values are 1 (USB2), 2 (USB3).
     36
     37Example:
     38		usbcluster: usb-cluster@18400 {
     39			compatible = "marvell,armada-375-usb-cluster";
     40			reg = <0x18400 0x4>;
     41			#phy-cells = <1>
     42		};