cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,rcar-gen3-pcie-phy.yaml (1038B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/phy/renesas,rcar-gen3-pcie-phy.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Renesas R-Car Generation 3 PCIe PHY
      8
      9maintainers:
     10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
     11
     12properties:
     13  compatible:
     14    const: renesas,r8a77980-pcie-phy
     15
     16  reg:
     17    maxItems: 1
     18
     19  clocks:
     20    maxItems: 1
     21
     22  power-domains:
     23    maxItems: 1
     24
     25  resets:
     26    maxItems: 1
     27
     28  '#phy-cells':
     29    const: 0
     30
     31required:
     32  - compatible
     33  - reg
     34  - clocks
     35  - power-domains
     36  - resets
     37  - '#phy-cells'
     38
     39additionalProperties: false
     40
     41examples:
     42  - |
     43    #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
     44    #include <dt-bindings/power/r8a77980-sysc.h>
     45
     46    pcie-phy@e65d0000 {
     47            compatible = "renesas,r8a77980-pcie-phy";
     48            reg = <0xe65d0000 0x8000>;
     49            #phy-cells = <0>;
     50            clocks = <&cpg CPG_MOD 319>;
     51            power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
     52            resets = <&cpg 319>;
     53    };