cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rockchip-pcie-phy.txt (864B)

      1Rockchip PCIE PHY
      2-----------------------
      3
      4Required properties:
      5 - compatible: rockchip,rk3399-pcie-phy
      6 - clocks: Must contain an entry in clock-names.
      7	See ../clocks/clock-bindings.txt for details.
      8 - clock-names: Must be "refclk"
      9 - resets: Must contain an entry in reset-names.
     10	See ../reset/reset.txt for details.
     11 - reset-names: Must be "phy"
     12
     13Required properties for legacy PHY mode (deprecated):
     14 - #phy-cells: must be 0
     15
     16Required properties for per-lane PHY mode (preferred):
     17 - #phy-cells: must be 1
     18
     19Example:
     20
     21grf: syscon@ff770000 {
     22	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
     23	#address-cells = <1>;
     24	#size-cells = <1>;
     25
     26	...
     27
     28	pcie_phy: pcie-phy {
     29		compatible = "rockchip,rk3399-pcie-phy";
     30		#phy-cells = <0>;
     31		clocks = <&cru SCLK_PCIEPHY_REF>;
     32		clock-names = "refclk";
     33		resets = <&cru SRST_PCIEPHY>;
     34		reset-names = "phy";
     35	};
     36};