cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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st-spear-miphy.txt (570B)

      1ST SPEAr miphy DT details
      2=========================
      3
      4ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
      5
      6Required properties:
      7- compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
      8- reg : offset and length of the PHY register set.
      9- misc: phandle for the syscon node to access misc registers
     10- #phy-cells : from the generic PHY bindings, must be 1.
     11	- cell[1]: 0 if phy used for SATA, 1 for PCIe.
     12
     13Optional properties:
     14- phy-id: Instance id of the phy. Only required when there are multiple phys
     15  present on a implementation.