cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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aspeed,ast2400-pinctrl.yaml (2833B)

      1# SPDX-License-Identifier: GPL-2.0-or-later
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: ASPEED AST2400 Pin Controller
      8
      9maintainers:
     10  - Andrew Jeffery <andrew@aj.id.au>
     11
     12description: |+
     13  The pin controller node should be the child of a syscon node with the
     14  required property:
     15
     16  - compatible:     Should be one of the following:
     17                    "aspeed,ast2400-scu", "syscon", "simple-mfd"
     18
     19  Refer to the the bindings described in
     20  Documentation/devicetree/bindings/mfd/syscon.yaml
     21
     22properties:
     23  compatible:
     24    const: aspeed,ast2400-pinctrl
     25  reg:
     26    maxItems: 2
     27
     28patternProperties:
     29  '^.*$':
     30    if:
     31      type: object
     32    then:
     33      patternProperties:
     34        "^function|groups$":
     35          $ref: "/schemas/types.yaml#/definitions/string"
     36          enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
     37                  ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
     38                  EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,
     39                  GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4,
     40                  I2C5, I2C6, I2C7, I2C8, I2C9, LPCPD, LPCPME, LPCRST, LPCSMI, MAC1LINK,
     41                  MAC2LINK, MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2,
     42                  NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4,
     43                  NDTS4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0,
     44                  PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
     45                  RMII2, ROM16, ROM8, ROMCS1, ROMCS2, ROMCS3, ROMCS4, RXD1, RXD2, RXD3,
     46                  RXD4, SALT1, SALT2, SALT3, SALT4, SD1, SD2, SGPMCK, SGPMI, SGPMLD,
     47                  SGPMO, SGPSCK, SGPSI0, SGPSI1, SGPSLD, SIOONCTRL, SIOPBI, SIOPBO,
     48                  SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1DEBUG, SPI1PASSTHRU,
     49                  SPICS1, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2,
     50                  TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, USB2H1, USBCKI, VGABIOS_ROM,
     51                  VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]
     52
     53allOf:
     54  - $ref: "pinctrl.yaml#"
     55
     56required:
     57  - compatible
     58
     59additionalProperties: false
     60
     61examples:
     62  - |
     63    syscon: scu@1e6e2000 {
     64        compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
     65        reg = <0x1e6e2000 0x1a8>;
     66
     67        pinctrl: pinctrl {
     68            compatible = "aspeed,ast2400-pinctrl";
     69
     70            pinctrl_i2c3_default: i2c3_default {
     71                function = "I2C3";
     72                groups = "I2C3";
     73            };
     74
     75            pinctrl_gpioh0_unbiased_default: gpioh0 {
     76                pins = "A8";
     77                bias-disable;
     78            };
     79        };
     80    };