cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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atmel,at91-pio4-pinctrl.txt (2623B)

      1* Atmel PIO4 Controller
      2
      3The Atmel PIO4 controller is used to select the function of a pin and to
      4configure it.
      5
      6Required properties:
      7- compatible:
      8	"atmel,sama5d2-pinctrl"
      9	"microchip,sama7g5-pinctrl"
     10- reg: base address and length of the PIO controller.
     11- interrupts: interrupt outputs from the controller, one for each bank.
     12- interrupt-controller: mark the device node as an interrupt controller.
     13- #interrupt-cells: should be two.
     14- gpio-controller: mark the device node as a gpio controller.
     15- #gpio-cells: should be two.
     16
     17Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
     18a general description of GPIO and interrupt bindings.
     19
     20Please refer to pinctrl-bindings.txt in this directory for details of the
     21common pinctrl bindings used by client devices.
     22
     23Subnode format
     24Each node (or subnode) will list the pins it needs and how to configured these
     25pins.
     26
     27	node {
     28		pinmux = <PIN_NUMBER_PINMUX>;
     29		GENERIC_PINCONFIG;
     30	};
     31
     32Required properties:
     33- pinmux: integer array. Each integer represents a pin number plus mux and
     34ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
     35right representation of the pin.
     36
     37Optional properties:
     38- GENERIC_PINCONFIG: generic pinconfig options to use:
     39	- bias-disable, bias-pull-down, bias-pull-up, drive-open-drain,
     40	  input-schmitt-enable, input-debounce, output-low, output-high.
     41	- for microchip,sama7g5-pinctrl only:
     42		- slew-rate: 0 - disabled, 1 - enabled (default)
     43- atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for
     44high drive. The default value is low drive.
     45
     46Example:
     47
     48#include <sama5d2-pinfunc.h>
     49
     50...
     51{
     52	pioA: pinctrl@fc038000 {
     53		compatible = "atmel,sama5d2-pinctrl";
     54		reg = <0xfc038000 0x600>;
     55		interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
     56			     <68 IRQ_TYPE_LEVEL_HIGH 7>,
     57			     <69 IRQ_TYPE_LEVEL_HIGH 7>,
     58			     <70 IRQ_TYPE_LEVEL_HIGH 7>;
     59		interrupt-controller;
     60		#interrupt-cells = <2>;
     61		gpio-controller;
     62		#gpio-cells = <2>;
     63		clocks = <&pioA_clk>;
     64
     65		pinctrl_i2c0_default: i2c0_default {
     66			pinmux = <PIN_PD21__TWD0>,
     67				 <PIN_PD22__TWCK0>;
     68			bias-disable;
     69		};
     70
     71		pinctrl_led_gpio_default: led_gpio_default {
     72			pinmux = <PIN_PB0>,
     73				 <PIN_PB5>;
     74			bias-pull-up;
     75			atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>;
     76		};
     77
     78		pinctrl_sdmmc1_default: sdmmc1_default {
     79			cmd_data {
     80				pinmux = <PIN_PA28__SDMMC1_CMD>,
     81					 <PIN_PA18__SDMMC1_DAT0>,
     82					 <PIN_PA19__SDMMC1_DAT1>,
     83					 <PIN_PA20__SDMMC1_DAT2>,
     84					 <PIN_PA21__SDMMC1_DAT3>;
     85				bias-pull-up;
     86			};
     87
     88			ck_cd {
     89				pinmux = <PIN_PA22__SDMMC1_CK>,
     90					 <PIN_PA30__SDMMC1_CD>;
     91				bias-disable;
     92			};
     93		};
     94		...
     95	};
     96};
     97...