cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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brcm,ns-pinmux.yaml (2094B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/brcm,ns-pinmux.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Broadcom Northstar pins mux controller
      8
      9maintainers:
     10  - Rafał Miłecki <rafal@milecki.pl>
     11
     12description:
     13  Some of Northstar SoCs's pins can be used for various purposes thanks to the
     14  mux controller. This binding allows describing mux controller and listing
     15  available functions. They can be referenced later by other bindings to let
     16  system configure controller correctly.
     17
     18  A list of pins varies across chipsets so few bindings are available.
     19
     20properties:
     21  compatible:
     22    enum:
     23      - brcm,bcm4708-pinmux
     24      - brcm,bcm4709-pinmux
     25      - brcm,bcm53012-pinmux
     26
     27  reg:
     28    maxItems: 1
     29
     30  reg-names:
     31    const: cru_gpio_control
     32
     33patternProperties:
     34  '-pins$':
     35    type: object
     36    description: pin node
     37    $ref: pinmux-node.yaml#
     38
     39    properties:
     40      function:
     41        enum: [ spi, i2c, pwm, uart1, mdio, uart2, sdio ]
     42      groups:
     43        minItems: 1
     44        maxItems: 4
     45        items:
     46          enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
     47                  uart1_grp, mdio_grp, uart2_grp, sdio_pwr_grp, sdio_1p8v_grp ]
     48
     49    required:
     50      - function
     51      - groups
     52
     53    additionalProperties: false
     54
     55allOf:
     56  - $ref: "pinctrl.yaml#"
     57  - if:
     58      properties:
     59        compatible:
     60          contains:
     61            const: brcm,bcm4708-pinmux
     62    then:
     63      patternProperties:
     64        '-pins$':
     65          properties:
     66            function:
     67              enum: [ spi, i2c, pwm, uart1 ]
     68            groups:
     69              items:
     70                enum: [ spi_grp, i2c_grp, pwm0_grp, pwm1_grp, pwm2_grp, pwm3_grp,
     71                        uart1_grp ]
     72
     73required:
     74  - reg
     75  - reg-names
     76
     77additionalProperties: false
     78
     79examples:
     80  - |
     81    pinctrl@1800c1c0 {
     82        compatible = "brcm,bcm4708-pinmux";
     83        reg = <0x1800c1c0 0x24>;
     84        reg-names = "cru_gpio_control";
     85
     86        spi-pins {
     87            function = "spi";
     88            groups = "spi_grp";
     89        };
     90    };