cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsl,imx50-pinctrl.txt (1012B)


      1* Freescale IMX50 IOMUX Controller
      2
      3Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
      4and usage.
      5
      6Required properties:
      7- compatible: "fsl,imx50-iomuxc"
      8- fsl,pins: two integers array, represents a group of pins mux and config
      9  setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
     10  pin working on a specific function, CONFIG is the pad setting value like
     11  pull-up for this pin. Please refer to imx50 datasheet for the valid pad
     12  config settings.
     13
     14CONFIG bits definition:
     15PAD_CTL_HVE			(1 << 13)
     16PAD_CTL_HYS			(1 << 8)
     17PAD_CTL_PKE			(1 << 7)
     18PAD_CTL_PUE			(1 << 6)
     19PAD_CTL_PUS_100K_DOWN		(0 << 4)
     20PAD_CTL_PUS_47K_UP		(1 << 4)
     21PAD_CTL_PUS_100K_UP		(2 << 4)
     22PAD_CTL_PUS_22K_UP		(3 << 4)
     23PAD_CTL_ODE			(1 << 3)
     24PAD_CTL_DSE_LOW			(0 << 1)
     25PAD_CTL_DSE_MED			(1 << 1)
     26PAD_CTL_DSE_HIGH		(2 << 1)
     27PAD_CTL_DSE_MAX			(3 << 1)
     28PAD_CTL_SRE_FAST		(1 << 0)
     29PAD_CTL_SRE_SLOW		(0 << 0)
     30
     31Refer to imx50-pinfunc.h in device tree source folder for all available
     32imx50 PIN_FUNC_ID.