cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ingenic,pinctrl.yaml (4977B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Ingenic SoCs pin controller devicetree bindings
      8
      9description: >
     10  Please refer to pinctrl-bindings.txt in this directory for details of the
     11  common pinctrl bindings used by client devices, including the meaning of the
     12  phrase "pin configuration node".
     13
     14  For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins
     15  may be used as GPIOs, multiplexed device functions are configured within the
     16  GPIO port configuration registers and it is typical to refer to pins using the
     17  naming scheme "PxN" where x is a character identifying the GPIO port with
     18  which the pin is associated and N is an integer from 0 to 31 identifying the
     19  pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
     20  and PB31 is the last pin in GPIO port B. The JZ4730, the JZ4740, the JZ4725B,
     21  the X1000 and the X1830 contains 4 GPIO ports, PA to PD, for a total of 128
     22  pins. The X2000 and the X2100 contains 5 GPIO ports, PA to PE, for a total of
     23  160 pins. The JZ4750, the JZ4755 the JZ4760, the JZ4770 and the JZ4780 contains
     24  6 GPIO ports, PA to PF, for a total of 192 pins. The JZ4775 contains 7 GPIO
     25  ports, PA to PG, for a total of 224 pins.
     26
     27maintainers:
     28  - Paul Cercueil <paul@crapouillou.net>
     29
     30properties:
     31  compatible:
     32    oneOf:
     33      - enum:
     34          - ingenic,jz4730-pinctrl
     35          - ingenic,jz4740-pinctrl
     36          - ingenic,jz4725b-pinctrl
     37          - ingenic,jz4750-pinctrl
     38          - ingenic,jz4755-pinctrl
     39          - ingenic,jz4760-pinctrl
     40          - ingenic,jz4770-pinctrl
     41          - ingenic,jz4775-pinctrl
     42          - ingenic,jz4780-pinctrl
     43          - ingenic,x1000-pinctrl
     44          - ingenic,x1500-pinctrl
     45          - ingenic,x1830-pinctrl
     46          - ingenic,x2000-pinctrl
     47          - ingenic,x2100-pinctrl
     48      - items:
     49          - const: ingenic,jz4760b-pinctrl
     50          - const: ingenic,jz4760-pinctrl
     51      - items:
     52          - const: ingenic,x1000e-pinctrl
     53          - const: ingenic,x1000-pinctrl
     54      - items:
     55          - const: ingenic,x2000e-pinctrl
     56          - const: ingenic,x2000-pinctrl
     57
     58  reg:
     59    maxItems: 1
     60
     61  "#address-cells":
     62    const: 1
     63
     64  "#size-cells":
     65    const: 0
     66
     67patternProperties:
     68  "^gpio@[0-9]$":
     69    type: object
     70    properties:
     71      compatible:
     72        enum:
     73          - ingenic,jz4730-gpio
     74          - ingenic,jz4740-gpio
     75          - ingenic,jz4725b-gpio
     76          - ingenic,jz4750-gpio
     77          - ingenic,jz4755-gpio
     78          - ingenic,jz4760-gpio
     79          - ingenic,jz4770-gpio
     80          - ingenic,jz4775-gpio
     81          - ingenic,jz4780-gpio
     82          - ingenic,x1000-gpio
     83          - ingenic,x1500-gpio
     84          - ingenic,x1830-gpio
     85          - ingenic,x2000-gpio
     86          - ingenic,x2100-gpio
     87
     88      reg:
     89        items:
     90          - description: The GPIO bank number
     91
     92      gpio-controller: true
     93
     94      "#gpio-cells":
     95        const: 2
     96
     97      gpio-ranges:
     98        maxItems: 1
     99
    100      interrupt-controller: true
    101
    102      "#interrupt-cells":
    103        const: 2
    104        description:
    105          Refer to ../interrupt-controller/interrupts.txt for more details.
    106
    107      interrupts:
    108        maxItems: 1
    109
    110    required:
    111      - compatible
    112      - reg
    113      - gpio-controller
    114      - "#gpio-cells"
    115      - interrupts
    116      - interrupt-controller
    117      - "#interrupt-cells"
    118
    119    additionalProperties: false
    120
    121allOf:
    122  - $ref: "pinctrl.yaml#"
    123
    124required:
    125  - compatible
    126  - reg
    127  - "#address-cells"
    128  - "#size-cells"
    129
    130additionalProperties:
    131  anyOf:
    132    - type: object
    133      allOf:
    134        - $ref: pincfg-node.yaml#
    135        - $ref: pinmux-node.yaml#
    136
    137      properties:
    138        phandle: true
    139        function: true
    140        groups: true
    141        pins: true
    142        bias-disable: true
    143        bias-pull-up: true
    144        bias-pull-down: true
    145        output-low: true
    146        output-high: true
    147      additionalProperties: false
    148
    149    - type: object
    150      properties:
    151        phandle: true
    152      additionalProperties:
    153        type: object
    154        allOf:
    155          - $ref: pincfg-node.yaml#
    156          - $ref: pinmux-node.yaml#
    157
    158        properties:
    159          phandle: true
    160          function: true
    161          groups: true
    162          pins: true
    163          bias-disable: true
    164          bias-pull-up: true
    165          bias-pull-down: true
    166          output-low: true
    167          output-high: true
    168        additionalProperties: false
    169
    170examples:
    171  - |
    172    pinctrl@10010000 {
    173      compatible = "ingenic,jz4770-pinctrl";
    174      reg = <0x10010000 0x600>;
    175
    176      #address-cells = <1>;
    177      #size-cells = <0>;
    178
    179      gpio@0 {
    180        compatible = "ingenic,jz4770-gpio";
    181        reg = <0>;
    182
    183        gpio-controller;
    184        gpio-ranges = <&pinctrl 0 0 32>;
    185        #gpio-cells = <2>;
    186
    187        interrupt-controller;
    188        #interrupt-cells = <2>;
    189
    190        interrupt-parent = <&intc>;
    191        interrupts = <17>;
    192      };
    193    };