cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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marvell,ac5-pinctrl.yaml (1945B)

      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Marvell AC5 pin controller
      8
      9maintainers:
     10  - Chris Packham <chris.packham@alliedtelesis.co.nz>
     11
     12description:
     13  Bindings for Marvell's AC5 memory-mapped pin controller.
     14
     15properties:
     16  compatible:
     17    items:
     18      - const: marvell,ac5-pinctrl
     19
     20  reg:
     21    maxItems: 1
     22
     23patternProperties:
     24  '-pins$':
     25    type: object
     26    $ref: pinmux-node.yaml#
     27
     28    properties:
     29      marvell,function:
     30        $ref: "/schemas/types.yaml#/definitions/string"
     31        description:
     32          Indicates the function to select.
     33        enum: [ dev_init_done, ge, gpio, i2c0, i2c1, int_out, led, nand, pcie, ptp, sdio,
     34                spi0, spi1, synce, tsen_int, uart0, uart1, uart2, uart3, uartsd, wd_int, xg ]
     35
     36      marvell,pins:
     37        $ref: /schemas/types.yaml#/definitions/string-array
     38        description:
     39          Array of MPP pins to be used for the given function.
     40        minItems: 1
     41        items:
     42          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9,
     43                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19,
     44                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29,
     45                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39,
     46                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
     47
     48allOf:
     49  - $ref: "pinctrl.yaml#"
     50
     51required:
     52  - compatible
     53  - reg
     54
     55additionalProperties: false
     56
     57examples:
     58  - |
     59    pinctrl@80020100 {
     60      compatible = "marvell,ac5-pinctrl";
     61      reg = <0x80020100 0x20>;
     62
     63      i2c0_pins: i2c0-pins {
     64        marvell,pins = "mpp26", "mpp27";
     65        marvell,function = "i2c0";
     66      };
     67
     68      i2c0_gpio: i2c0-gpio-pins {
     69        marvell,pins = "mpp26", "mpp27";
     70        marvell,function = "gpio";
     71      };
     72    };