cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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meson,pinctrl.txt (2987B)

      1== Amlogic Meson pinmux controller ==
      2
      3Required properties for the root node:
      4 - compatible: one of "amlogic,meson8-cbus-pinctrl"
      5		      "amlogic,meson8b-cbus-pinctrl"
      6		      "amlogic,meson8m2-cbus-pinctrl"
      7		      "amlogic,meson8-aobus-pinctrl"
      8		      "amlogic,meson8b-aobus-pinctrl"
      9		      "amlogic,meson8m2-aobus-pinctrl"
     10		      "amlogic,meson-gxbb-periphs-pinctrl"
     11		      "amlogic,meson-gxbb-aobus-pinctrl"
     12		      "amlogic,meson-gxl-periphs-pinctrl"
     13		      "amlogic,meson-gxl-aobus-pinctrl"
     14		      "amlogic,meson-axg-periphs-pinctrl"
     15		      "amlogic,meson-axg-aobus-pinctrl"
     16		      "amlogic,meson-g12a-periphs-pinctrl"
     17		      "amlogic,meson-g12a-aobus-pinctrl"
     18		      "amlogic,meson-a1-periphs-pinctrl"
     19		      "amlogic,meson-s4-periphs-pinctrl"
     20 - reg: address and size of registers controlling irq functionality
     21
     22=== GPIO sub-nodes ===
     23
     24The GPIO bank for the controller is represented as a sub-node and it acts as a
     25GPIO controller.
     26
     27Required properties for sub-nodes are:
     28 - reg: should contain a list of address and size, one tuple for each entry
     29   in reg-names.
     30 - reg-names: an array of strings describing the "reg" entries.
     31   Must contain "mux" and "gpio".
     32   May contain "pull", "pull-enable" and "ds" when appropriate.
     33 - gpio-controller: identifies the node as a gpio controller
     34 - #gpio-cells: must be 2
     35
     36=== Other sub-nodes ===
     37
     38Child nodes without the "gpio-controller" represent some desired
     39configuration for a pin or a group. Those nodes can be pinmux nodes or
     40configuration nodes.
     41
     42Required properties for pinmux nodes are:
     43 - groups: a list of pinmux groups. The list of all available groups
     44   depends on the SoC and can be found in driver sources.
     45 - function: the name of a function to activate for the specified set
     46   of groups. The list of all available functions depends on the SoC
     47   and can be found in driver sources.
     48
     49Required properties for configuration nodes:
     50 - pins: a list of pin names
     51
     52Configuration nodes support the following generic properties, as
     53described in file pinctrl-bindings.txt:
     54 - "bias-disable"
     55 - "bias-pull-up"
     56 - "bias-pull-down"
     57 - "output-enable"
     58 - "output-disable"
     59 - "output-low"
     60 - "output-high"
     61
     62Optional properties :
     63 - drive-strength-microamp: Drive strength for the specified pins in uA.
     64			    This property is only valid for G12A and newer.
     65
     66=== Example ===
     67
     68	pinctrl: pinctrl@c1109880 {
     69		compatible = "amlogic,meson8-cbus-pinctrl";
     70		reg = <0xc1109880 0x10>;
     71		#address-cells = <1>;
     72		#size-cells = <1>;
     73		ranges;
     74
     75		gpio: banks@c11080b0 {
     76			reg = <0xc11080b0 0x28>,
     77			      <0xc11080e8 0x18>,
     78			      <0xc1108120 0x18>,
     79			      <0xc1108030 0x30>;
     80			reg-names = "mux", "pull", "pull-enable", "gpio";
     81			gpio-controller;
     82			#gpio-cells = <2>;
     83               };
     84
     85		nand {
     86			mux {
     87				groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
     88					 "nand_io_rb0", "nand_ale", "nand_cle",
     89					 "nand_wen_clk", "nand_ren_clk", "nand_dqs",
     90					 "nand_ce2", "nand_ce3";
     91				function = "nand";
     92			};
     93		};
     94	};