cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nuvoton,npcm7xx-pinctrl.txt (9044B)


      1Nuvoton NPCM7XX Pin Controllers
      2
      3The Nuvoton BMC NPCM7XX Pin Controller multi-function routed through
      4the multiplexing block, Each pin supports GPIO functionality (GPIOx)
      5and multiple functions that directly connect the pin to different
      6hardware blocks.
      7
      8Required properties:
      9- #address-cells : should be 1.
     10- #size-cells	 : should be 1.
     11- compatible	 : "nuvoton,npcm750-pinctrl" for Poleg NPCM7XX.
     12- ranges	 : defines mapping ranges between pin controller node (parent)
     13			to GPIO bank node (children).
     14
     15=== GPIO Bank Subnode ===
     16
     17The NPCM7XX has 8 GPIO Banks each GPIO bank supports 32 GPIO.
     18
     19Required GPIO Bank subnode-properties:
     20- reg 			: specifies physical base address and size of the GPIO
     21				bank registers.
     22- gpio-controller	: Marks the device node as a GPIO controller.
     23- #gpio-cells		: Must be <2>. The first cell is the gpio pin number
     24				and the second cell is used for optional parameters.
     25- interrupts		: contain the GPIO bank interrupt with flags for falling edge.
     26- gpio-ranges		: defines the range of pins managed by the GPIO bank controller.
     27
     28For example, GPIO bank subnodes like the following:
     29	gpio0: gpio@f0010000 {
     30		gpio-controller;
     31		#gpio-cells = <2>;
     32		reg = <0x0 0x80>;
     33		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
     34		gpio-ranges = <&pinctrl 0 0 32>;
     35	};
     36
     37=== Pin Mux Subnode ===
     38
     39- pin: A string containing the name of the pin
     40	An array of strings, each string containing the name of a pin.
     41	These pin are used for selecting pin configuration.
     42
     43The following are the list of pins available:
     44	"GPIO0/IOX1DI", "GPIO1/IOX1LD",	"GPIO2/IOX1CK", "GPIO3/IOX1D0",
     45	"GPIO4/IOX2DI/SMB1DSDA", "GPIO5/IOX2LD/SMB1DSCL", "GPIO6/IOX2CK/SMB2DSDA",
     46	"GPIO7/IOX2D0/SMB2DSCL", "GPIO8/LKGPO1", "GPIO9/LKGPO2", "GPIO10/IOXHLD",
     47	"GPIO11/IOXHCK", "GPIO12/GSPICK/SMB5BSCL", "GPIO13/GSPIDO/SMB5BSDA",
     48	"GPIO14/GSPIDI/SMB5CSCL", "GPIO15/GSPICS/SMB5CSDA", "GPIO16/LKGPO0",
     49	"GPIO17/PSPI2DI/SMB4DEN","GPIO18/PSPI2D0/SMB4BSDA", "GPIO19/PSPI2CK/SMB4BSCL",
     50	"GPIO20/SMB4CSDA/SMB15SDA", "GPIO21/SMB4CSCL/SMB15SCL", "GPIO22/SMB4DSDA/SMB14SDA",
     51	"GPIO23/SMB4DSCL/SMB14SCL", "GPIO24/IOXHDO", "GPIO25/IOXHDI", "GPIO26/SMB5SDA",
     52	"GPIO27/SMB5SCL", "GPIO28/SMB4SDA", "GPIO29/SMB4SCL", "GPIO30/SMB3SDA",
     53	"GPIO31/SMB3SCL", "GPIO32/nSPI0CS1","SPI0D2", "SPI0D3", "GPIO37/SMB3CSDA",
     54	"GPIO38/SMB3CSCL", "GPIO39/SMB3BSDA", "GPIO40/SMB3BSCL", "GPIO41/BSPRXD",
     55	"GPO42/BSPTXD/STRAP11", "GPIO43/RXD1/JTMS2/BU1RXD", "GPIO44/nCTS1/JTDI2/BU1CTS",
     56	"GPIO45/nDCD1/JTDO2", "GPIO46/nDSR1/JTCK2", "GPIO47/nRI1/JCP_RDY2",
     57	"GPIO48/TXD2/BSPTXD", "GPIO49/RXD2/BSPRXD", "GPIO50/nCTS2", "GPO51/nRTS2/STRAP2",
     58	"GPIO52/nDCD2", "GPO53/nDTR2_BOUT2/STRAP1", "GPIO54/nDSR2", "GPIO55/nRI2",
     59	"GPIO56/R1RXERR", "GPIO57/R1MDC", "GPIO58/R1MDIO", "GPIO59/SMB3DSDA",
     60	"GPIO60/SMB3DSCL", "GPO61/nDTR1_BOUT1/STRAP6", "GPO62/nRTST1/STRAP5",
     61	"GPO63/TXD1/STRAP4", "GPIO64/FANIN0", "GPIO65/FANIN1", "GPIO66/FANIN2",
     62	"GPIO67/FANIN3", "GPIO68/FANIN4", "GPIO69/FANIN5", "GPIO70/FANIN6", "GPIO71/FANIN7",
     63	"GPIO72/FANIN8", "GPIO73/FANIN9", "GPIO74/FANIN10", "GPIO75/FANIN11",
     64	"GPIO76/FANIN12", "GPIO77/FANIN13","GPIO78/FANIN14", "GPIO79/FANIN15",
     65	"GPIO80/PWM0", "GPIO81/PWM1", "GPIO82/PWM2", "GPIO83/PWM3", "GPIO84/R2TXD0",
     66	"GPIO85/R2TXD1", "GPIO86/R2TXEN", "GPIO87/R2RXD0", "GPIO88/R2RXD1", "GPIO89/R2CRSDV",
     67	"GPIO90/R2RXERR", "GPIO91/R2MDC", "GPIO92/R2MDIO", "GPIO93/GA20/SMB5DSCL",
     68	"GPIO94/nKBRST/SMB5DSDA", "GPIO95/nLRESET/nESPIRST", "GPIO96/RG1TXD0",
     69	"GPIO97/RG1TXD1", "GPIO98/RG1TXD2", "GPIO99/RG1TXD3","GPIO100/RG1TXC",
     70	"GPIO101/RG1TXCTL", "GPIO102/RG1RXD0", "GPIO103/RG1RXD1", "GPIO104/RG1RXD2",
     71	"GPIO105/RG1RXD3", "GPIO106/RG1RXC", "GPIO107/RG1RXCTL", "GPIO108/RG1MDC",
     72	"GPIO109/RG1MDIO", "GPIO110/RG2TXD0/DDRV0", "GPIO111/RG2TXD1/DDRV1",
     73	"GPIO112/RG2TXD2/DDRV2", "GPIO113/RG2TXD3/DDRV3", "GPIO114/SMB0SCL",
     74	"GPIO115/SMB0SDA", "GPIO116/SMB1SCL", "GPIO117/SMB1SDA", "GPIO118/SMB2SCL",
     75	"GPIO119/SMB2SDA", "GPIO120/SMB2CSDA", "GPIO121/SMB2CSCL", "GPIO122/SMB2BSDA",
     76	"GPIO123/SMB2BSCL", "GPIO124/SMB1CSDA", "GPIO125/SMB1CSCL","GPIO126/SMB1BSDA",
     77	"GPIO127/SMB1BSCL", "GPIO128/SMB8SCL", "GPIO129/SMB8SDA", "GPIO130/SMB9SCL",
     78	"GPIO131/SMB9SDA", "GPIO132/SMB10SCL", "GPIO133/SMB10SDA","GPIO134/SMB11SCL",
     79	"GPIO135/SMB11SDA", "GPIO136/SD1DT0", "GPIO137/SD1DT1", "GPIO138/SD1DT2",
     80	"GPIO139/SD1DT3", "GPIO140/SD1CLK", "GPIO141/SD1WP", "GPIO142/SD1CMD",
     81	"GPIO143/SD1CD/SD1PWR", "GPIO144/PWM4",	"GPIO145/PWM5",	"GPIO146/PWM6",
     82	"GPIO147/PWM7",	"GPIO148/MMCDT4", "GPIO149/MMCDT5", "GPIO150/MMCDT6",
     83	"GPIO151/MMCDT7", "GPIO152/MMCCLK", "GPIO153/MMCWP", "GPIO154/MMCCMD",
     84	"GPIO155/nMMCCD/nMMCRST", "GPIO156/MMCDT0", "GPIO157/MMCDT1", "GPIO158/MMCDT2",
     85	"GPIO159/MMCDT3", "GPIO160/CLKOUT/RNGOSCOUT", "GPIO161/nLFRAME/nESPICS",
     86	"GPIO162/SERIRQ", "GPIO163/LCLK/ESPICLK", "GPIO164/LAD0/ESPI_IO0",
     87	"GPIO165/LAD1/ESPI_IO1", "GPIO166/LAD2/ESPI_IO2", "GPIO167/LAD3/ESPI_IO3",
     88	"GPIO168/nCLKRUN/nESPIALERT", "GPIO169/nSCIPME", "GPIO170/nSMI", "GPIO171/SMB6SCL",
     89	"GPIO172/SMB6SDA", "GPIO173/SMB7SCL", "GPIO174/SMB7SDA", "GPIO175/PSPI1CK/FANIN19",
     90	"GPIO176/PSPI1DO/FANIN18", "GPIO177/PSPI1DI/FANIN17", "GPIO178/R1TXD0",
     91	"GPIO179/R1TXD1", "GPIO180/R1TXEN", "GPIO181/R1RXD0", "GPIO182/R1RXD1",
     92	"GPIO183/SPI3CK", "GPO184/SPI3D0/STRAP9", "GPO185/SPI3D1/STRAP10",
     93	"GPIO186/nSPI3CS0", "GPIO187/nSPI3CS1",	"GPIO188/SPI3D2/nSPI3CS2",
     94	"GPIO189/SPI3D3/nSPI3CS3", "GPIO190/nPRD_SMI", "GPIO191", "GPIO192", "GPIO193/R1CRSDV",
     95	"GPIO194/SMB0BSCL", "GPIO195/SMB0BSDA", "GPIO196/SMB0CSCL", "GPIO197/SMB0DEN",
     96	"GPIO198/SMB0DSDA", "GPIO199/SMB0DSCL", "GPIO200/R2CK", "GPIO201/R1CK",
     97	"GPIO202/SMB0CSDA", "GPIO203/FANIN16", "GPIO204/DDC2SCL", "GPIO205/DDC2SDA",
     98	"GPIO206/HSYNC2", "GPIO207/VSYNC2", "GPIO208/RG2TXC/DVCK", "GPIO209/RG2TXCTL/DDRV4",
     99	"GPIO210/RG2RXD0/DDRV5", "GPIO211/RG2RXD1/DDRV6", "GPIO212/RG2RXD2/DDRV7",
    100	"GPIO213/RG2RXD3/DDRV8", "GPIO214/RG2RXC/DDRV9", "GPIO215/RG2RXCTL/DDRV10",
    101	"GPIO216/RG2MDC/DDRV11", "GPIO217/RG2MDIO/DVHSYNC", "GPIO218/nWDO1",
    102	"GPIO219/nWDO2", "GPIO220/SMB12SCL", "GPIO221/SMB12SDA", "GPIO222/SMB13SCL",
    103	"GPIO223/SMB13SDA", "GPIO224/SPIXCK", "GPO225/SPIXD0/STRAP12", "GPO226/SPIXD1/STRAP13",
    104	"GPIO227/nSPIXCS0", "GPIO228/nSPIXCS1",	"GPO229/SPIXD2/STRAP3", "GPIO230/SPIXD3",
    105	"GPIO231/nCLKREQ", "GPI255/DACOSEL"
    106
    107Optional Properties:
    108 bias-disable, bias-pull-down, bias-pull-up, input-enable,
    109 input-disable, output-high, output-low, drive-push-pull,
    110 drive-open-drain, input-debounce, slew-rate, drive-strength
    111
    112 slew-rate valid arguments are:
    113				<0> - slow
    114				<1> - fast
    115 drive-strength valid arguments are:
    116				<2> - 2mA
    117				<4> - 4mA
    118				<8> - 8mA
    119				<12> - 12mA
    120				<16> - 16mA
    121				<24> - 24mA
    122
    123For example, pinctrl might have pinmux subnodes like the following:
    124
    125	gpio0_iox1d1_pin: gpio0-iox1d1-pin {
    126		pins = "GPIO0/IOX1DI";
    127		output-high;
    128	};
    129	gpio0_iox1ck_pin: gpio0-iox1ck-pin {
    130		pins = "GPIO2/IOX1CK";
    131		output_high;
    132	};
    133
    134=== Pin Group Subnode ===
    135
    136Required pin group subnode-properties:
    137- groups : A string containing the name of the group to mux.
    138- function: A string containing the name of the function to mux to the
    139  group.
    140
    141The following are the list of the available groups and functions :
    142	smb0, smb0b, smb0c, smb0d, smb0den, smb1, smb1b, smb1c, smb1d,
    143	smb2, smb2b, smb2c, smb2d, smb3, smb3b, smb3c, smb3d, smb4, smb4b,
    144	smb4c, smb4d, smb4den, smb5, smb5b, smb5c, smb5d, ga20kbc, smb6,
    145	smb7, smb8, smb9, smb10, smb11, smb12, smb13, smb14, smb15, fanin0,
    146	fanin1, fanin2, fanin3, fanin4, fanin5, fanin6, fanin7, fanin8,
    147	fanin9, fanin10, fanin11 fanin12 fanin13, fanin14, fanin15, faninx,
    148	pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, rg1, rg1mdio, rg2,
    149	rg2mdio, ddr, uart1, uart2, bmcuart0a, bmcuart0b, bmcuart1, iox1,
    150	iox2, ioxh, gspi, mmc, mmcwp, mmccd, mmcrst, mmc8, r1, r1err, r1md,
    151	r2, r2err, r2md, sd1, sd1pwr, wdog1, wdog2, scipme, sci, serirq,
    152	jtag2, spix, spixcs1, pspi1, pspi2, ddc, clkreq, clkout, spi3, spi3cs1,
    153	spi3quad, spi3cs2, spi3cs3, spi0cs1, lpc, lpcclk, espi, lkgpo0, lkgpo1,
    154	lkgpo2, nprd_smi
    155
    156For example, pinctrl might have group subnodes like the following:
    157	r1err_pins: r1err-pins {
    158		groups = "r1err";
    159		function = "r1err";
    160	};
    161	r1md_pins: r1md-pins {
    162		groups = "r1md";
    163		function = "r1md";
    164	};
    165	r1_pins: r1-pins {
    166		groups = "r1";
    167		function = "r1";
    168	};
    169
    170Examples
    171========
    172pinctrl: pinctrl@f0800000 {
    173	#address-cells = <1>;
    174	#size-cells = <1>;
    175	compatible = "nuvoton,npcm750-pinctrl";
    176	ranges = <0 0xf0010000 0x8000>;
    177
    178	gpio0: gpio@f0010000 {
    179		gpio-controller;
    180		#gpio-cells = <2>;
    181		reg = <0x0 0x80>;
    182		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
    183		gpio-ranges = <&pinctrl 0 0 32>;
    184	};
    185
    186	....
    187
    188	gpio7: gpio@f0017000 {
    189		gpio-controller;
    190		#gpio-cells = <2>;
    191		reg = <0x7000 0x80>;
    192		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
    193		gpio-ranges = <&pinctrl 0 224 32>;
    194	};
    195
    196	gpio0_iox1d1_pin: gpio0-iox1d1-pin {
    197		pins = "GPIO0/IOX1DI";
    198		output-high;
    199	};
    200
    201	iox1_pins: iox1-pins {
    202		groups = "iox1";
    203		function = "iox1";
    204	};
    205	iox2_pins: iox2-pins {
    206		groups = "iox2";
    207		function = "iox2";
    208	};
    209
    210	....
    211
    212	clkreq_pins: clkreq-pins {
    213		groups = "clkreq";
    214		function = "clkreq";
    215	};
    216};