nvidia,tegra124-dpaux-padctl.txt (1597B)
1Device tree binding for NVIDIA Tegra DPAUX pad controller 2======================================================== 3 4The Tegra Display Port Auxiliary (DPAUX) pad controller manages two pins 5which can be assigned to either the DPAUX channel or to an I2C 6controller. 7 8This document defines the device-specific binding for the DPAUX pad 9controller. Refer to pinctrl-bindings.txt in this directory for generic 10information about pin controller device tree bindings. Please refer to 11the binding document ../display/tegra/nvidia,tegra20-host1x.txt for more 12details on the DPAUX binding. 13 14Pin muxing: 15----------- 16 17Child nodes contain the pinmux configurations following the conventions 18from the pinctrl-bindings.txt document. 19 20Since only three configurations are possible, only three child nodes are 21needed to describe the pin mux'ing options for the DPAUX pads. 22Furthermore, given that the pad functions are only applicable to a 23single set of pads, the child nodes only need to describe the pad group 24the functions are being applied to rather than the individual pads. 25 26Required properties: 27- groups: Must be "dpaux-io" 28- function: Must be either "aux", "i2c" or "off". 29 30Example: 31-------- 32 33 dpaux@545c0000 { 34 ... 35 36 state_dpaux_aux: pinmux-aux { 37 groups = "dpaux-io"; 38 function = "aux"; 39 }; 40 41 state_dpaux_i2c: pinmux-i2c { 42 groups = "dpaux-io"; 43 function = "i2c"; 44 }; 45 46 state_dpaux_off: pinmux-off { 47 groups = "dpaux-io"; 48 function = "off"; 49 }; 50 }; 51 52 ... 53 54 i2c@7000d100 { 55 ... 56 pinctrl-0 = <&state_dpaux_i2c>; 57 pinctrl-1 = <&state_dpaux_off>; 58 pinctrl-names = "default", "idle"; 59 };