cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nxp,lpc1850-scu.txt (1615B)


      1NXP LPC18xx/43xx SCU pin controller Device Tree Bindings
      2--------------------------------------------------------
      3
      4Required properties:
      5- compatible		: Should be "nxp,lpc1850-scu"
      6- reg			: Address and length of the register set for the device
      7- clocks		: Clock specifier (see clock bindings for details)
      8
      9The lpc1850-scu driver uses the generic pin multiplexing and generic pin
     10configuration documented in pinctrl-bindings.txt.
     11
     12The following generic nodes are supported:
     13 - function
     14 - pins
     15 - bias-disable
     16 - bias-pull-up
     17 - bias-pull-down
     18 - drive-strength
     19 - input-enable
     20 - input-disable
     21 - input-schmitt-enable
     22 - input-schmitt-disable
     23 - slew-rate
     24
     25NXP specific properties:
     26 - nxp,gpio-pin-interrupt : Assign pin to gpio pin interrupt controller
     27			    irq number 0 to 7. See example below.
     28
     29Not all pins support all properties so either refer to the NXP 1850/4350
     30user manual or the pin table in the pinctrl-lpc18xx driver for supported
     31pin properties.
     32
     33Example:
     34pinctrl: pinctrl@40086000 {
     35	compatible = "nxp,lpc1850-scu";
     36	reg = <0x40086000 0x1000>;
     37	clocks = <&ccu1 CLK_CPU_SCU>;
     38
     39	i2c0_pins: i2c0-pins {
     40		i2c0_pins_cfg {
     41			pins = "i2c0_scl", "i2c0_sda";
     42			function = "i2c0";
     43			input-enable;
     44		};
     45	};
     46
     47	uart0_pins: uart0-pins {
     48		uart0_rx_cfg {
     49			pins = "pf_11";
     50			function = "uart0";
     51			bias-disable;
     52			input-enable;
     53		};
     54
     55		uart0_tx_cfg {
     56			pins = "pf_10";
     57			function = "uart0";
     58			bias-disable;
     59		};
     60	};
     61
     62	gpio_joystick_pins: gpio-joystick-pins {
     63		gpio_joystick_1_cfg {
     64			pins =  "p9_0";
     65			function = "gpio";
     66			nxp,gpio-pin-interrupt = <0>;
     67			input-enable;
     68			bias-disable;
     69		};
     70	};
     71};