cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

oxnas,pinctrl.txt (1533B)


      1* Oxford Semiconductor OXNAS SoC Family Pin Controller
      2
      3Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
      4../interrupt-controller/interrupts.txt for generic information regarding
      5pin controller, GPIO, and interrupt bindings.
      6
      7OXNAS 'pin configuration node' is a node of a group of pins which can be
      8used for a specific device or function. This node represents configurations of
      9pins, optional function, and optional mux related configuration.
     10
     11Required properties for pin controller node:
     12 - compatible: "oxsemi,ox810se-pinctrl" or "oxsemi,ox820-pinctrl"
     13 - oxsemi,sys-ctrl: a phandle to the system controller syscon node
     14
     15Required properties for pin configuration sub-nodes:
     16 - pins: List of pins to which the configuration applies.
     17
     18Optional properties for pin configuration sub-nodes:
     19----------------------------------------------------
     20 - function: Mux function for the specified pins.
     21 - bias-pull-up: Enable weak pull-up.
     22
     23Example:
     24
     25pinctrl: pinctrl {
     26	compatible = "oxsemi,ox810se-pinctrl";
     27
     28	/* Regmap for sys registers */
     29	oxsemi,sys-ctrl = <&sys>;
     30
     31	pinctrl_uart2: pinctrl_uart2 {
     32		uart2a {
     33			pins = "gpio31";
     34			function = "fct3";
     35		};
     36		uart2b {
     37			pins = "gpio32";
     38			function = "fct3";
     39		};
     40	};
     41};
     42
     43uart2: serial@900000 {
     44	compatible = "ns16550a";
     45	reg = <0x900000 0x100000>;
     46	clocks = <&sysclk>;
     47	interrupts = <29>;
     48	reg-shift = <0>;
     49	fifo-size = <16>;
     50	reg-io-width = <1>;
     51	current-speed = <115200>;
     52	no-loopback-test;
     53	resets = <&reset 22>;
     54	pinctrl-names = "default";
     55	pinctrl-0 = <&pinctrl_uart2>;
     56};