cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl-mt8195.yaml (10550B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Mediatek MT8195 Pin Controller
      8
      9maintainers:
     10  - Sean Wang <sean.wang@mediatek.com>
     11
     12description: |
     13  The Mediatek's Pin controller is used to control SoC pins.
     14
     15properties:
     16  compatible:
     17    const: mediatek,mt8195-pinctrl
     18
     19  gpio-controller: true
     20
     21  '#gpio-cells':
     22    description: |
     23      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
     24      the amount of cells must be specified as 2. See the below
     25      mentioned gpio binding representation for description of particular cells.
     26    const: 2
     27
     28  gpio-ranges:
     29    description: gpio valid number range.
     30    maxItems: 1
     31
     32  reg:
     33    description: |
     34      Physical address base for gpio base registers. There are 8 GPIO
     35      physical address base in mt8195.
     36    maxItems: 8
     37
     38  reg-names:
     39    description: |
     40      Gpio base register names.
     41    maxItems: 8
     42
     43  interrupt-controller: true
     44
     45  '#interrupt-cells':
     46    const: 2
     47
     48  interrupts:
     49    description: The interrupt outputs to sysirq.
     50    maxItems: 1
     51
     52  mediatek,rsel_resistance_in_si_unit:
     53    type: boolean
     54    description: |
     55      Identifying i2c pins pull up/down type which is RSEL. It can support
     56      RSEL define or si unit value(ohm) to set different resistance.
     57
     58# PIN CONFIGURATION NODES
     59patternProperties:
     60  '-pins$':
     61    type: object
     62    additionalProperties: false
     63    patternProperties:
     64      '^pins':
     65        type: object
     66        additionalProperties: false
     67        description: |
     68          A pinctrl node should contain at least one subnodes representing the
     69          pinctrl groups available on the machine. Each subnode will list the
     70          pins it needs, and how they should be configured, with regard to muxer
     71          configuration, pullups, drive strength, input enable/disable and
     72          input schmitt.
     73          An example of using macro:
     74          pincontroller {
     75            /* GPIO0 set as multifunction GPIO0 */
     76            gpio-pins {
     77              pins {
     78                pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
     79              }
     80            };
     81            /* GPIO8 set as multifunction SDA0 */
     82            i2c0-pins {
     83              pins {
     84                pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
     85              }
     86            };
     87          };
     88        $ref: "pinmux-node.yaml"
     89
     90        properties:
     91          pinmux:
     92            description: |
     93              Integer array, represents gpio pin number and mux setting.
     94              Supported pin number and mux varies for different SoCs, and are
     95              defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h
     96              directly.
     97
     98          drive-strength:
     99            enum: [2, 4, 6, 8, 10, 12, 14, 16]
    100
    101          mediatek,drive-strength-adv:
    102            description: |
    103              Describe the specific driving setup property.
    104              For I2C pins, the existing generic driving setup can only support
    105              2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they
    106              can support 0.125/0.25/0.5/1mA adjustment. If we enable specific
    107              driving setup, the existing generic setup will be disabled.
    108              The specific driving setup is controlled by E1E0EN.
    109              When E1=0/E0=0, the strength is 0.125mA.
    110              When E1=0/E0=1, the strength is 0.25mA.
    111              When E1=1/E0=0, the strength is 0.5mA.
    112              When E1=1/E0=1, the strength is 1mA.
    113              EN is used to enable or disable the specific driving setup.
    114              Valid arguments are described as below:
    115              0: (E1, E0, EN) = (0, 0, 0)
    116              1: (E1, E0, EN) = (0, 0, 1)
    117              2: (E1, E0, EN) = (0, 1, 0)
    118              3: (E1, E0, EN) = (0, 1, 1)
    119              4: (E1, E0, EN) = (1, 0, 0)
    120              5: (E1, E0, EN) = (1, 0, 1)
    121              6: (E1, E0, EN) = (1, 1, 0)
    122              7: (E1, E0, EN) = (1, 1, 1)
    123              So the valid arguments are from 0 to 7.
    124            $ref: /schemas/types.yaml#/definitions/uint32
    125            enum: [0, 1, 2, 3, 4, 5, 6, 7]
    126
    127          bias-pull-down:
    128            oneOf:
    129              - type: boolean
    130              - enum: [100, 101, 102, 103]
    131                description: mt8195 pull down PUPD/R0/R1 type define value.
    132              - enum: [200, 201, 202, 203, 204, 205, 206, 207]
    133                description: mt8195 pull down RSEL type define value.
    134              - enum: [75000, 5000]
    135                description: mt8195 pull down RSEL type si unit value(ohm).
    136            description: |
    137              For pull down type is normal, it don't need add RSEL & R1R0 define
    138              and resistance value.
    139              For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
    140              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
    141              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
    142              "MTK_PUPD_SET_R1R0_11" define in mt8195.
    143              For pull down type is RSEL, it can add RSEL define & resistance
    144              value(ohm) to set different resistance by identifying property
    145              "mediatek,rsel_resistance_in_si_unit".
    146              It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
    147              & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
    148              & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
    149              & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
    150              define in mt8195. It can also support resistance value(ohm)
    151              "75000" & "5000" in mt8195.
    152
    153              An example of using RSEL define:
    154              pincontroller {
    155                i2c0_pin {
    156                  pins {
    157                    pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
    158                    bias-pull-down = <MTK_PULL_SET_RSEL_001>;
    159                  }
    160                };
    161              };
    162              An example of using si unit resistance value(ohm):
    163              &pio {
    164                mediatek,rsel_resistance_in_si_unit;
    165              }
    166              pincontroller {
    167                i2c0_pin {
    168                  pins {
    169                    pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
    170                    bias-pull-down = <75000>;
    171                  }
    172                };
    173              };
    174
    175          bias-pull-up:
    176            oneOf:
    177              - type: boolean
    178              - enum: [100, 101, 102, 103]
    179                description: mt8195 pull up PUPD/R0/R1 type define value.
    180              - enum: [200, 201, 202, 203, 204, 205, 206, 207]
    181                description: mt8195 pull up RSEL type define value.
    182              - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000]
    183                description: mt8195 pull up RSEL type si unit value(ohm).
    184            description: |
    185              For pull up type is normal, it don't need add RSEL & R1R0 define
    186              and resistance value.
    187              For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
    188              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
    189              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
    190              "MTK_PUPD_SET_R1R0_11" define in mt8195.
    191              For pull up type is RSEL, it can add RSEL define & resistance
    192              value(ohm) to set different resistance by identifying property
    193              "mediatek,rsel_resistance_in_si_unit".
    194              It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001"
    195              & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
    196              & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
    197              & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
    198              define in mt8195. It can also support resistance value(ohm)
    199              "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" &
    200              "75000" in mt8195.
    201              An example of using RSEL define:
    202              pincontroller {
    203                i2c0-pins {
    204                  pins {
    205                    pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
    206                    bias-pull-up = <MTK_PULL_SET_RSEL_001>;
    207                  }
    208                };
    209              };
    210              An example of using si unit resistance value(ohm):
    211              &pio {
    212                mediatek,rsel_resistance_in_si_unit;
    213              }
    214              pincontroller {
    215                i2c0-pins {
    216                  pins {
    217                    pinmux = <PINMUX_GPIO8__FUNC_SDA0>;
    218                    bias-pull-up = <1000>;
    219                  }
    220                };
    221              };
    222
    223          bias-disable: true
    224
    225          output-high: true
    226
    227          output-low: true
    228
    229          input-enable: true
    230
    231          input-disable: true
    232
    233          input-schmitt-enable: true
    234
    235          input-schmitt-disable: true
    236
    237        required:
    238          - pinmux
    239
    240allOf:
    241  - $ref: "pinctrl.yaml#"
    242
    243required:
    244  - compatible
    245  - reg
    246  - interrupts
    247  - interrupt-controller
    248  - '#interrupt-cells'
    249  - gpio-controller
    250  - '#gpio-cells'
    251  - gpio-ranges
    252
    253additionalProperties: false
    254
    255examples:
    256  - |
    257    #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
    258    #include <dt-bindings/interrupt-controller/arm-gic.h>
    259    #
    260    pio: pinctrl@10005000 {
    261      compatible = "mediatek,mt8195-pinctrl";
    262      reg = <0x10005000 0x1000>,
    263            <0x11d10000 0x1000>,
    264            <0x11d30000 0x1000>,
    265            <0x11d40000 0x1000>,
    266            <0x11e20000 0x1000>,
    267            <0x11eb0000 0x1000>,
    268            <0x11f40000 0x1000>,
    269            <0x1000b000 0x1000>;
    270      reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",
    271                  "iocfg_br", "iocfg_lm", "iocfg_rb",
    272                  "iocfg_tl", "eint";
    273      gpio-controller;
    274      #gpio-cells = <2>;
    275      gpio-ranges = <&pio 0 0 144>;
    276      interrupt-controller;
    277      interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0>;
    278      #interrupt-cells = <2>;
    279
    280      pio-pins {
    281        pins {
    282          pinmux = <PINMUX_GPIO0__FUNC_GPIO0>;
    283          output-low;
    284        };
    285      };
    286
    287      spi0-pins {
    288        pins-spi {
    289          pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
    290                   <PINMUX_GPIO134__FUNC_SPIM0_MO>,
    291                   <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
    292          bias-disable;
    293        };
    294        pins-spi-mi {
    295          pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
    296          bias-pull-down;
    297        };
    298      };
    299
    300      i2c0-pins {
    301        pins {
    302          pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
    303                   <PINMUX_GPIO9__FUNC_SCL0>;
    304          bias-disable;
    305          mediatek,drive-strength-adv = <7>;
    306        };
    307      };
    308    };