cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pinctrl.yaml (1644B)


      1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Pin controller device
      8
      9maintainers:
     10  - Linus Walleij <linus.walleij@linaro.org>
     11  - Rafał Miłecki <rafal@milecki.pl>
     12
     13description: |
     14  Pin controller devices should contain the pin configuration nodes that client
     15  devices reference.
     16
     17  The contents of each of those pin configuration child nodes is defined
     18  entirely by the binding for the individual pin controller device. There
     19  exists no common standard for this content. The pinctrl framework only
     20  provides generic helper bindings that the pin controller driver can use.
     21
     22  The pin configuration nodes need not be direct children of the pin controller
     23  device; they may be grandchildren, for example. Whether this is legal, and
     24  whether there is any interaction between the child and intermediate parent
     25  nodes, is again defined entirely by the binding for the individual pin
     26  controller device.
     27
     28properties:
     29  $nodename:
     30    pattern: "^(pinctrl|pinmux)(@[0-9a-f]+)?$"
     31
     32  "#pinctrl-cells":
     33    description: >
     34      Number of pin control cells in addition to the index within the pin
     35      controller device instance.
     36
     37  pinctrl-use-default:
     38    type: boolean
     39    description: >
     40      Indicates that the OS can use the boot default pin configuration. This
     41      allows using an OS that does not have a driver for the pin controller.
     42      This property can be set either globally for the pin controller or in
     43      child nodes for individual pin group control.
     44
     45additionalProperties: true