cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,mdm9615-pinctrl.txt (4276B)

      1Qualcomm MDM9615 TLMM block
      2
      3This binding describes the Top Level Mode Multiplexer block found in the
      4MDM9615 platform.
      5
      6- compatible:
      7	Usage: required
      8	Value type: <string>
      9	Definition: must be "qcom,mdm9615-pinctrl"
     10
     11- reg:
     12	Usage: required
     13	Value type: <prop-encoded-array>
     14	Definition: the base address and size of the TLMM register space.
     15
     16- interrupts:
     17	Usage: required
     18	Value type: <prop-encoded-array>
     19	Definition: should specify the TLMM summary IRQ.
     20
     21- interrupt-controller:
     22	Usage: required
     23	Value type: <none>
     24	Definition: identifies this node as an interrupt controller
     25
     26- #interrupt-cells:
     27	Usage: required
     28	Value type: <u32>
     29	Definition: must be 2. Specifying the pin number and flags, as defined
     30		    in <dt-bindings/interrupt-controller/irq.h>
     31
     32- gpio-controller:
     33	Usage: required
     34	Value type: <none>
     35	Definition: identifies this node as a gpio controller
     36
     37- #gpio-cells:
     38	Usage: required
     39	Value type: <u32>
     40	Definition: must be 2. Specifying the pin number and flags, as defined
     41		    in <dt-bindings/gpio/gpio.h>
     42
     43- gpio-ranges:
     44	Usage: required
     45	Definition:  see ../gpio/gpio.txt
     46
     47- gpio-reserved-ranges:
     48	Usage: optional
     49	Definition: see ../gpio/gpio.txt
     50
     51Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
     52a general description of GPIO and interrupt bindings.
     53
     54Please refer to pinctrl-bindings.txt in this directory for details of the
     55common pinctrl bindings used by client devices, including the meaning of the
     56phrase "pin configuration node".
     57
     58The pin configuration nodes act as a container for an arbitrary number of
     59subnodes. Each of these subnodes represents some desired configuration for a
     60pin, a group, or a list of pins or groups. This configuration can include the
     61mux function to select on those pin(s)/group(s), and various pin configuration
     62parameters, such as pull-up, drive strength, etc.
     63
     64
     65PIN CONFIGURATION NODES:
     66
     67The name of each subnode is not important; all subnodes should be enumerated
     68and processed purely based on their content.
     69
     70Each subnode only affects those parameters that are explicitly listed. In
     71other words, a subnode that lists a mux function but no pin configuration
     72parameters implies no information about any pin configuration parameters.
     73Similarly, a pin subnode that describes a pullup parameter implies no
     74information about e.g. the mux function.
     75
     76
     77The following generic properties as defined in pinctrl-bindings.txt are valid
     78to specify in a pin configuration subnode:
     79
     80- pins:
     81	Usage: required
     82	Value type: <string-array>
     83	Definition: List of gpio pins affected by the properties specified in
     84		    this subnode.  Valid pins are:
     85		    gpio0-gpio87
     86
     87- function:
     88	Usage: required
     89	Value type: <string>
     90	Definition: Specify the alternative function to be configured for the
     91		    specified pins.
     92		    Valid values are:
     93		    gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,
     94		    sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,
     95		    cdc_mclk
     96
     97- bias-disable:
     98	Usage: optional
     99	Value type: <none>
    100	Definition: The specified pins should be configured as no pull.
    101
    102- bias-pull-down:
    103	Usage: optional
    104	Value type: <none>
    105	Definition: The specified pins should be configured as pull down.
    106
    107- bias-pull-up:
    108	Usage: optional
    109	Value type: <none>
    110	Definition: The specified pins should be configured as pull up.
    111
    112- output-high:
    113	Usage: optional
    114	Value type: <none>
    115	Definition: The specified pins are configured in output mode, driven
    116		    high.
    117
    118- output-low:
    119	Usage: optional
    120	Value type: <none>
    121	Definition: The specified pins are configured in output mode, driven
    122		    low.
    123
    124- drive-strength:
    125	Usage: optional
    126	Value type: <u32>
    127	Definition: Selects the drive strength for the specified pins, in mA.
    128		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16
    129
    130Example:
    131
    132	msmgpio: pinctrl@800000 {
    133		compatible = "qcom,mdm9615-pinctrl";
    134		reg = <0x800000 0x4000>;
    135
    136		gpio-controller;
    137		#gpio-cells = <2>;
    138		gpio-ranges = <&msmgpio 0 0 88>;
    139		interrupt-controller;
    140		#interrupt-cells = <2>;
    141		interrupts = <0 16 0x4>;
    142
    143		gsbi8_uart: gsbi8-uart {
    144			mux {
    145				pins = "gpio34", "gpio35";
    146				function = "gsbi8";
    147			};
    148
    149			tx {
    150				pins = "gpio34";
    151				drive-strength = <4>;
    152				bias-disable;
    153			};
    154
    155			rx {
    156				pins = "gpio35";
    157				drive-strength = <2>;
    158				bias-pull-up;
    159			};
    160		};
    161	};