cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

qcom,sc8180x-pinctrl.yaml (4935B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Technologies, Inc. SC8180X TLMM block
      8
      9maintainers:
     10  - Bjorn Andersson <bjorn.andersson@linaro.org>
     11
     12description: |
     13  This binding describes the Top Level Mode Multiplexer block found in the
     14  SC8180X platform.
     15
     16allOf:
     17  - $ref: "pinctrl.yaml#"
     18  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
     19
     20properties:
     21  compatible:
     22    const: qcom,sc8180x-tlmm
     23
     24  reg:
     25    maxItems: 3
     26
     27  reg-names:
     28    items:
     29      - const: "west"
     30      - const: "east"
     31      - const: "south"
     32
     33  interrupts: true
     34  interrupt-controller: true
     35  '#interrupt-cells': true
     36  gpio-controller: true
     37  gpio-reserved-ranges: true
     38  '#gpio-cells': true
     39  gpio-ranges: true
     40  wakeup-parent: true
     41
     42required:
     43  - compatible
     44  - reg
     45  - reg-names
     46
     47additionalProperties: false
     48
     49patternProperties:
     50  '-state$':
     51    oneOf:
     52      - $ref: "#/$defs/qcom-sc8180x-tlmm-state"
     53      - patternProperties:
     54          ".*":
     55            $ref: "#/$defs/qcom-sc8180x-tlmm-state"
     56
     57'$defs':
     58  qcom-sc8180x-tlmm-state:
     59    type: object
     60    description:
     61      Pinctrl node's client devices use subnodes for desired pin configuration.
     62      Client device subnodes use below standard properties.
     63    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
     64
     65    properties:
     66      pins:
     67        description:
     68          List of gpio pins affected by the properties specified in this
     69          subnode.
     70        items:
     71          oneOf:
     72            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-8][0-9])$"
     73            - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
     74        minItems: 1
     75        maxItems: 16
     76
     77      function:
     78        description:
     79          Specify the alternative function to be configured for the specified
     80          pins.
     81
     82        enum: [ adsp_ext, agera_pll, aoss_cti, atest_char, atest_tsens,
     83                atest_tsens2, atest_usb0, atest_usb1, atest_usb2, atest_usb3,
     84                atest_usb4, audio_ref, btfm_slimbus, cam_mclk, cci_async,
     85                cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,
     86                cci_timer4, cci_timer5, cci_timer6, cci_timer7, cci_timer8,
     87                cci_timer9, cri_trng, dbg_out, ddr_bist, ddr_pxi, debug_hot,
     88                dp_hot, edp_hot, edp_lcd, emac_phy, emac_pps, gcc_gp1, gcc_gp2,
     89                gcc_gp3, gcc_gp4, gcc_gp5, gpio, gps, grfc, hs1_mi2s, hs2_mi2s,
     90                hs3_mi2s, jitter_bist, lpass_slimbus, m_voc, mdp_vsync,
     91                mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mdp_vsync4,
     92                mdp_vsync5, mss_lte, nav_pps, pa_indicator, pci_e0, pci_e1,
     93                pci_e2, pci_e3, phase_flag, pll_bist, pll_bypassnl, pll_reset,
     94                pri_mi2s, pri_mi2s_ws, prng_rosc, qdss_cti, qdss_gpio, qlink,
     95                qspi0, qspi0_clk, qspi0_cs, qspi1, qspi1_clk, qspi1_cs,
     96                qua_mi2s, qup0, qup1, qup2, qup3, qup4, qup5, qup6, qup7, qup8,
     97                qup9, qup10, qup11, qup12, qup13, qup14, qup15, qup16, qup17,
     98                qup18, qup19, qup_l4, qup_l5, qup_l6, rgmii, sd_write, sdc4,
     99                sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, spkr_i2s, ter_mi2s, tgu,
    100                tsense_pwm1, tsense_pwm2, tsif1, tsif2, uim1, uim2, uim_batt,
    101                usb0_phy, usb1_phy, usb2phy_ac, vfr_1, vsense_trigger,
    102                wlan1_adc, wlan2_adc, wmss_reset ]
    103
    104      bias-disable: true
    105      bias-pull-down: true
    106      bias-pull-up: true
    107      drive-strength: true
    108      input-enable: true
    109      output-high: true
    110      output-low: true
    111
    112    required:
    113      - pins
    114      - function
    115
    116    additionalProperties: false
    117
    118examples:
    119  - |
    120        #include <dt-bindings/interrupt-controller/arm-gic.h>
    121        pinctrl@3100000 {
    122                compatible = "qcom,sc8180x-tlmm";
    123                reg = <0x03100000 0x300000>,
    124                      <0x03500000 0x700000>,
    125                      <0x03d00000 0x300000>;
    126                reg-names = "west", "east", "south";
    127                interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
    128                gpio-controller;
    129                #gpio-cells = <2>;
    130                interrupt-controller;
    131                #interrupt-cells = <2>;
    132                gpio-ranges = <&tlmm 0 0 190>;
    133
    134                gpio-wo-subnode-state {
    135                        pins = "gpio1";
    136                        function = "gpio";
    137                };
    138
    139                uart-w-subnodes-state {
    140                        rx {
    141                                pins = "gpio4";
    142                                function = "qup6";
    143                                bias-pull-up;
    144                        };
    145
    146                        tx {
    147                                pins = "gpio5";
    148                                function = "qup6";
    149                                bias-disable;
    150                        };
    151                };
    152        };
    153...