cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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qcom,sm6115-pinctrl.yaml (5158B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-pinctrl.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block
      8
      9maintainers:
     10  - Iskren Chernev <iskren.chernev@gmail.com>
     11
     12description:
     13  This binding describes the Top Level Mode Multiplexer block found in the
     14  SM4250/6115 platforms.
     15
     16properties:
     17  compatible:
     18    const: qcom,sm6115-tlmm
     19
     20  reg:
     21    minItems: 3
     22    maxItems: 3
     23
     24  reg-names:
     25    items:
     26      - const: west
     27      - const: south
     28      - const: east
     29
     30  interrupts:
     31    description: Specifies the TLMM summary IRQ
     32    maxItems: 1
     33
     34  interrupt-controller: true
     35
     36  '#interrupt-cells':
     37    description:
     38      Specifies the PIN numbers and Flags, as defined in defined in
     39      include/dt-bindings/interrupt-controller/irq.h
     40    const: 2
     41
     42  gpio-controller: true
     43
     44  '#gpio-cells':
     45    description: Specifying the pin number and flags, as defined in
     46      include/dt-bindings/gpio/gpio.h
     47    const: 2
     48
     49  gpio-ranges:
     50    maxItems: 1
     51
     52  wakeup-parent: true
     53
     54#PIN CONFIGURATION NODES
     55patternProperties:
     56  '-state$':
     57    oneOf:
     58      - $ref: "#/$defs/qcom-sm6115-tlmm-state"
     59      - patternProperties:
     60          ".*":
     61            $ref: "#/$defs/qcom-sm6115-tlmm-state"
     62
     63'$defs':
     64  qcom-sm6115-tlmm-state:
     65    type: object
     66    description:
     67      Pinctrl node's client devices use subnodes for desired pin configuration.
     68      Client device subnodes use below standard properties.
     69    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
     70
     71    properties:
     72      pins:
     73        description:
     74          List of gpio pins affected by the properties specified in this
     75          subnode.
     76        items:
     77          oneOf:
     78            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
     79            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,
     80                      sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]
     81        minItems: 1
     82        maxItems: 36
     83
     84      function:
     85        description:
     86          Specify the alternative function to be configured for the specified
     87          pins.
     88
     89        enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,
     90                cci_timer, cri_trng, dac_calib, dbg_out, ddr_bist, ddr_pxi0,
     91                ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2, gcc_gp3, gpio,
     92                gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx, jitter_bist,
     93                mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1, mpm_pwr, mss_lte,
     94                m_voc, nav_gpio, pa_indicator, pbs, pbs_out, phase_flag,
     95                pll_bist, pll_bypassnl, pll_reset, prng_rosc, qdss_cti,
     96                qdss_gpio, qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb,
     97                sdc2_tb, sd_write, ssbi_wtr1, tgu, tsense_pwm, uim1_clk,
     98                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,
     99                uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger,
    100                wlan1_adc0, elan1_adc1 ]
    101
    102      drive-strength:
    103        enum: [2, 4, 6, 8, 10, 12, 14, 16]
    104        default: 2
    105        description:
    106          Selects the drive strength for the specified pins, in mA.
    107
    108      bias-pull-down: true
    109
    110      bias-pull-up: true
    111
    112      bias-disable: true
    113
    114      output-high: true
    115
    116      output-low: true
    117
    118    required:
    119      - pins
    120
    121    additionalProperties: false
    122
    123allOf:
    124  - $ref: "pinctrl.yaml#"
    125
    126required:
    127  - compatible
    128  - reg
    129  - reg-names
    130  - interrupts
    131  - interrupt-controller
    132  - '#interrupt-cells'
    133  - gpio-controller
    134  - '#gpio-cells'
    135  - gpio-ranges
    136
    137additionalProperties: false
    138
    139examples:
    140  - |
    141        #include <dt-bindings/interrupt-controller/arm-gic.h>
    142        tlmm: pinctrl@500000 {
    143                compatible = "qcom,sm6115-tlmm";
    144                reg = <0x500000 0x400000>,
    145                        <0x900000 0x400000>,
    146                        <0xd00000 0x400000>;
    147                reg-names = "west", "south", "east";
    148                interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
    149                gpio-controller;
    150                #gpio-cells = <2>;
    151                interrupt-controller;
    152                #interrupt-cells = <2>;
    153                gpio-ranges = <&tlmm 0 0 114>;
    154
    155                sdc2_on_state: sdc2-on-state {
    156                        clk {
    157                                pins = "sdc2_clk";
    158                                bias-disable;
    159                                drive-strength = <16>;
    160                        };
    161
    162                        cmd {
    163                                pins = "sdc2_cmd";
    164                                bias-pull-up;
    165                                drive-strength = <10>;
    166                        };
    167
    168                        data {
    169                                pins = "sdc2_data";
    170                                bias-pull-up;
    171                                drive-strength = <10>;
    172                        };
    173
    174                        sd-cd {
    175                                pins = "gpio88";
    176                                function = "gpio";
    177                                bias-pull-up;
    178                                drive-strength = <2>;
    179                        };
    180                };
    181        };