cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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samsung,pinctrl-pins-cfg.yaml (2883B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
      8
      9maintainers:
     10  - Krzysztof Kozlowski <krzk@kernel.org>
     11  - Sylwester Nawrocki <s.nawrocki@samsung.com>
     12  - Tomasz Figa <tomasz.figa@gmail.com>
     13
     14description: |
     15  This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
     16  controller.
     17
     18  Pins configuration for Samsung S3C/S5P/Exynos SoC pin controller.
     19
     20  The values used for config properties should be derived from the hardware
     21  manual and these values are programmed as-is into the pin pull up/down and
     22  driver strength register of the pin-controller.
     23  See also include/dt-bindings/pinctrl/samsung.h with useful constants.
     24
     25  See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
     26  additional information and example.
     27
     28properties:
     29  samsung,pins:
     30    description: |
     31      List of pins to configure. For initial and sleep states, the maximum
     32      number is one pin. In other cases there is no upper limit.
     33
     34      The pins should use lowercase names matching hardware manual, e.g. for
     35      GPA0 bank: gpa0-0, gpa0-1, gpa0-2.
     36    $ref: /schemas/types.yaml#/definitions/string-array
     37
     38  samsung,pin-function:
     39    description: |
     40      The pin function selection that should be applied on the pins listed in the
     41      child node is specified using the "samsung,pin-function" property. The value
     42      of this property that should be applied to each of the pins listed in the
     43      "samsung,pins" property should be picked from the hardware manual of the SoC
     44      for the specified pin group. This property is optional in the child node if
     45      no specific function selection is desired for the pins listed in the child
     46      node. The value of this property is used as-is to program the pin-controller
     47      function selector register of the pin-bank.
     48    $ref: /schemas/types.yaml#/definitions/uint32
     49    minimum: 0
     50    maximum: 15
     51
     52  samsung,pin-drv:
     53    description: Drive strength configuration.
     54    $ref: /schemas/types.yaml#/definitions/uint32
     55    minimum: 0
     56    maximum: 15
     57
     58  samsung,pin-pud:
     59    description: Pull up/down configuration.
     60    $ref: /schemas/types.yaml#/definitions/uint32
     61    enum: [0, 1, 2, 3]
     62
     63  samsung,pin-val:
     64    description: Initial value of pin output buffer.
     65    $ref: /schemas/types.yaml#/definitions/uint32
     66    enum: [0, 1]
     67
     68  samsung,pin-con-pdn:
     69    description: Function in power down mode.
     70    $ref: /schemas/types.yaml#/definitions/uint32
     71    enum: [0, 1, 2, 3]
     72
     73  samsung,pin-pud-pdn:
     74    description: Pull up/down configuration in power down mode.
     75    $ref: /schemas/types.yaml#/definitions/uint32
     76    enum: [0, 1, 2, 3]
     77
     78required:
     79  - samsung,pins
     80
     81additionalProperties: false