cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sprd,sc9860-pinctrl.txt (2149B)

      1* Spreadtrum SC9860 Pin Controller
      2
      3Please refer to sprd,pinctrl.txt in this directory for common binding part
      4and usage.
      5
      6Required properties:
      7- compatible: Must be "sprd,sc9860-pinctrl".
      8- reg: The register address of pin controller device.
      9- pins : An array of strings, each string containing the name of a pin.
     10
     11Optional properties:
     12- function: A string containing the name of the function, values must be
     13  one of: "func1", "func2", "func3" and "func4".
     14- drive-strength: Drive strength in mA. Supported values: 2, 4, 6, 8, 10,
     15  12, 14, 16, 20, 21, 24, 25, 27, 29, 31 and 33.
     16- input-schmitt-disable: Enable schmitt-trigger mode.
     17- input-schmitt-enable: Disable schmitt-trigger mode.
     18- bias-disable: Disable pin bias.
     19- bias-pull-down: Pull down on pin.
     20- bias-pull-up: Pull up on pin. Supported values: 20000 for pull-up resistor
     21  is 20K and 4700 for pull-up resistor is 4.7K.
     22- input-enable: Enable pin input.
     23- input-disable: Enable pin output.
     24- output-high: Set the pin as an output level high.
     25- output-low: Set the pin as an output level low.
     26- sleep-hardware-state: Indicate these configs in this state are sleep related.
     27- sprd,control: Control values referring to databook for global control pins.
     28- sprd,sleep-mode: Choose the pin sleep mode, and supported values are:
     29  AP_SLEEP, PUBCP_SLEEP, TGLDSP_SLEEP and AGDSP_SLEEP.
     30
     31Pin sleep mode definition:
     32enum pin_sleep_mode {
     33	AP_SLEEP = BIT(0),
     34	PUBCP_SLEEP = BIT(1),
     35	TGLDSP_SLEEP = BIT(2),
     36	AGDSP_SLEEP = BIT(3),
     37};
     38
     39Example:
     40pin_controller: pinctrl@402a0000 {
     41	compatible = "sprd,sc9860-pinctrl";
     42	reg = <0x402a0000 0x10000>;
     43
     44	grp1: sd0 {
     45		pins = "SC9860_VIO_SD2_IRTE", "SC9860_VIO_SD0_IRTE";
     46		sprd,control = <0x1>;
     47	};
     48
     49	grp2: rfctl_33 {
     50		pins = "SC9860_RFCTL33";
     51		function = "func2";
     52		sprd,sleep-mode = <AP_SLEEP | PUBCP_SLEEP>;
     53		grp2_sleep_mode: rfctl_33_sleep {
     54			pins = "SC9860_RFCTL33";
     55			sleep-hardware-state;
     56			output-low;
     57		}
     58	};
     59
     60	grp3: rfctl_misc_20 {
     61		pins = "SC9860_RFCTL20_MISC";
     62		drive-strength = <10>;
     63		bias-pull-up = <4700>;
     64		grp3_sleep_mode: rfctl_misc_sleep {
     65			pins = "SC9860_RFCTL20_MISC";
     66			sleep-hardware-state;
     67			bias-pull-up;
     68		}
     69	};
     70};