cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ste,nomadik.txt (4234B)


      1ST Ericsson Nomadik pinmux controller
      2
      3Required properties:
      4- compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
      5              "stericsson,stn8815-pinctrl"
      6- nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
      7              (these have the register ranges used by the pin controller).
      8- prcm: phandle to the PRCMU managing the back end of this pin controller
      9
     10Please refer to pinctrl-bindings.txt in this directory for details of the
     11common pinctrl bindings used by client devices, including the meaning of the
     12phrase "pin configuration node".
     13
     14ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
     15subnodes. Each of these subnodes represents some desired configuration for a
     16pin, a group, or a list of pins or groups. This configuration can include the
     17mux function to select on those pin(s)/group(s), and various pin configuration
     18parameters, such as input, output, pull up, pull down...
     19
     20The name of each subnode is not important; all subnodes should be enumerated
     21and processed purely based on their content. The subnodes use the generic
     22pin multiplexing node layout from the standard pin control bindings
     23(see pinctrl-bindings.txt):
     24
     25Required pin multiplexing subnode properties:
     26- function: A string containing the name of the function to mux to the
     27  pin or group.
     28- groups : An array of strings. Each string contains the name of a pin
     29  group that will be combined with the function to form a multiplexing
     30  set-up.
     31
     32Required pin configuration subnode properties:
     33- pins: A string array describing the pins affected by the configuration
     34  in the node.
     35- ste,config: Handle of pin configuration node
     36  (e.g. ste,config = <&slpm_in_wkup_pdis>)
     37
     38- ste,input : <0/1/2>
     39	0: input with no pull
     40	1: input with pull up,
     41	2: input with pull down,
     42
     43- ste,output: <0/1/2>
     44	0: output low,
     45	1: output high,
     46	2: output (value is not specified).
     47
     48- ste,sleep: <0/1>
     49	0: sleep mode disable,
     50	1: sleep mode enable.
     51
     52- ste,sleep-input: <0/1/2/3>
     53	0: sleep input with no pull,
     54	1: sleep input with pull up,
     55	2: sleep input with pull down.
     56	3: sleep input and keep last input configuration (no pull, pull up or pull down).
     57
     58- ste,sleep-output: <0/1/2>
     59	0: sleep output low,
     60	1: sleep output high,
     61	2: sleep output (value is not specified).
     62
     63- ste,sleep-gpio: <0/1>
     64	0: disable sleep gpio mode,
     65	1: enable sleep gpio mode.
     66
     67- ste,sleep-wakeup: <0/1>
     68	0: wake-up detection enabled,
     69	1: wake-up detection disabled.
     70
     71- ste,sleep-pull-disable: <0/1>
     72	0: GPIO pull-up or pull-down resistor is enabled, when pin is an input,
     73	1: GPIO pull-up and pull-down resistor are disabled.
     74
     75Example board file extract:
     76
     77	pinctrl@80157000 {
     78		compatible = "stericsson,db8500-pinctrl";
     79		nomadik-gpio-chips = <&gpio0>, <&gpio1>, <&gpio2>, <&gpio3>;
     80		prcm = <&prcmu>;
     81
     82		pinctrl-names = "default";
     83
     84		slpm_in_wkup_pdis: slpm_in_wkup_pdis {
     85			ste,sleep = <1>;
     86			ste,sleep-input = <3>;
     87			ste,sleep-wakeup = <1>;
     88			ste,sleep-pull-disable = <0>;
     89		};
     90
     91		slpm_out_hi_wkup_pdis: slpm_out_hi_wkup_pdis {
     92			ste,sleep = <1>;
     93			ste,sleep-output = <1>;
     94			ste,sleep-wakeup = <1>;
     95			ste,sleep-pull-disable = <0>;
     96		};
     97
     98		slpm_out_wkup_pdis: slpm_out_wkup_pdis {
     99			ste,sleep = <1>;
    100			ste,sleep-output = <2>;
    101			ste,sleep-wakeup = <1>;
    102			ste,sleep-pull-disable = <0>;
    103		};
    104
    105		uart0 {
    106			uart0_default_mux: uart0_mux {
    107				u0_default_mux {
    108					function = "u0";
    109					pins = "u0_a_1";
    110				};
    111			};
    112			uart0_default_mode: uart0_default {
    113				uart0_default_cfg1 {
    114					pins = "GPIO0", "GPIO2";
    115					ste,input = <1>;
    116				};
    117
    118				uart0_default_cfg2 {
    119					pins = "GPIO1", "GPIO3";
    120					ste,output = <1>;
    121				};
    122			};
    123			uart0_sleep_mode: uart0_sleep {
    124				uart0_sleep_cfg1 {
    125					pins = "GPIO0", "GPIO2";
    126					ste,config = <&slpm_in_wkup_pdis>;
    127				};
    128				uart0_sleep_cfg2 {
    129					pins = "GPIO1";
    130					ste,config = <&slpm_out_hi_wkup_pdis>;
    131				};
    132				uart0_sleep_cfg3 {
    133					pins = "GPIO3";
    134					ste,config = <&slpm_out_wkup_pdis>;
    135				};
    136			};
    137		};
    138	};
    139
    140	uart@80120000 {
    141		compatible = "arm,pl011", "arm,primecell";
    142		reg = <0x80120000 0x1000>;
    143		interrupts = <0 11 0x4>;
    144
    145		pinctrl-names = "default","sleep";
    146		pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
    147		pinctrl-1 = <&uart0_sleep_mode>;
    148	};