cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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apple,pmgr-pwrstate.yaml (2098B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Apple SoC PMGR Power States
      8
      9maintainers:
     10  - Hector Martin <marcan@marcan.st>
     11
     12allOf:
     13  - $ref: "power-domain.yaml#"
     14
     15description: |
     16  Apple SoCs include PMGR blocks responsible for power management,
     17  which can control various clocks, resets, power states, and
     18  performance features. This binding describes the device power
     19  state registers, which control power states and resets.
     20
     21  Each instance of a power controller within the PMGR syscon node
     22  represents a generic power domain provider, as documented in
     23  Documentation/devicetree/bindings/power/power-domain.yaml.
     24  The provider controls a single SoC block. The power hierarchy is
     25  represented via power-domains relationships between these nodes.
     26
     27  See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
     28  for the top-level PMGR node documentation.
     29
     30properties:
     31  compatible:
     32    items:
     33      - enum:
     34          - apple,t8103-pmgr-pwrstate
     35          - apple,t6000-pmgr-pwrstate
     36      - const: apple,pmgr-pwrstate
     37
     38  reg:
     39    maxItems: 1
     40
     41  "#power-domain-cells":
     42    const: 0
     43
     44  "#reset-cells":
     45    const: 0
     46
     47  power-domains:
     48    description:
     49      Reference to parent power domains. A domain may have multiple parents,
     50      and all will be powered up when it is powered.
     51    minItems: 1
     52    maxItems: 8 # Arbitrary, should be enough
     53
     54  label:
     55    description:
     56      Specifies the name of the SoC domain being controlled. This is used to
     57      name the power/reset domains.
     58
     59  apple,always-on:
     60    description:
     61      Forces this power domain to always be powered up.
     62    type: boolean
     63
     64  apple,min-state:
     65    description:
     66      Specifies the minimum power state for auto-PM.
     67      0 = power gated, 4 = clock gated, 15 = on.
     68    $ref: /schemas/types.yaml#/definitions/uint32
     69    minimum: 0
     70    maximum: 15
     71
     72required:
     73  - compatible
     74  - reg
     75  - "#power-domain-cells"
     76  - "#reset-cells"
     77  - label
     78
     79additionalProperties: false