cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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maxim,max17040.yaml (2334B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/power/supply/maxim,max17040.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Maxim 17040 fuel gauge series
      8
      9maintainers:
     10  - Sebastian Reichel <sre@kernel.org>
     11
     12allOf:
     13  - $ref: power-supply.yaml#
     14
     15properties:
     16  compatible:
     17    enum:
     18      - maxim,max17040
     19      - maxim,max17041
     20      - maxim,max17043
     21      - maxim,max17044
     22      - maxim,max17048
     23      - maxim,max17049
     24      - maxim,max17058
     25      - maxim,max17059
     26      - maxim,max77836-battery
     27
     28  reg:
     29    maxItems: 1
     30
     31  maxim,alert-low-soc-level:
     32    $ref: /schemas/types.yaml#/definitions/uint32
     33    minimum: 1
     34    maximum: 32
     35    description: |
     36      The alert threshold that sets the state of charge level (%) where an interrupt is generated.
     37      If skipped the power up default value of 4 (%) will be used.
     38
     39  maxim,double-soc:
     40    type: boolean
     41    description: |
     42      Certain devices return double the capacity.
     43      Specify this to divide the reported value in 2 and thus normalize it.
     44      SoC == State of Charge == Capacity.
     45
     46  maxim,rcomp:
     47    $ref: /schemas/types.yaml#/definitions/uint8-array
     48    minItems: 1
     49    maxItems: 2
     50    description: |
     51      A value to compensate readings for various battery chemistries and operating temperatures.
     52      max17040,41 have 2 byte rcomp, default to 0x97 0x00.
     53      All other devices have one byte rcomp, default to 0x97.
     54
     55  interrupts:
     56    maxItems: 1
     57
     58  wakeup-source:
     59    type: boolean
     60    description: |
     61      Use this property to use alert low SoC level interrupt as wake up source.
     62
     63required:
     64  - compatible
     65  - reg
     66
     67unevaluatedProperties: false
     68
     69examples:
     70  - |
     71    i2c0 {
     72      #address-cells = <1>;
     73      #size-cells = <0>;
     74
     75      battery@36 {
     76        compatible = "maxim,max17048";
     77        reg = <0x36>;
     78        maxim,rcomp = /bits/ 8 <0x56>;
     79        maxim,alert-low-soc-level = <10>;
     80        maxim,double-soc;
     81      };
     82    };
     83  - |
     84    #include <dt-bindings/interrupt-controller/irq.h>
     85    i2c0 {
     86      #address-cells = <1>;
     87      #size-cells = <0>;
     88
     89      battery@36 {
     90        compatible = "maxim,max77836-battery";
     91        reg = <0x36>;
     92        maxim,alert-low-soc-level = <10>;
     93        interrupt-parent = <&gpio7>;
     94        interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
     95        wakeup-source;
     96      };
     97    };