cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pwm-st.txt (1449B)


      1STMicroelectronics PWM driver bindings
      2--------------------------------------
      3
      4Required parameters:
      5- compatible :		"st,pwm"
      6- #pwm-cells : 		Number of cells used to specify a PWM. First cell
      7			specifies the per-chip index of the PWM to use and the
      8			second cell is the period in nanoseconds - fixed to 2
      9			for STiH41x.
     10- reg :			Physical base address and length of the controller's
     11			registers.
     12- pinctrl-names: 	Set to "default".
     13- pinctrl-0: 		List of phandles pointing to pin configuration nodes
     14			for PWM module.
     15			For Pinctrl properties, please refer to [1].
     16- clock-names: 		Valid entries are "pwm" and/or "capture".
     17- clocks: 		phandle of the clock used by the PWM module.
     18			For Clk properties, please refer to [2].
     19- interrupts:		IRQ for the Capture device
     20
     21Optional properties:
     22- st,pwm-num-chan:	Number of available PWM channels.  Default is 0.
     23- st,capture-num-chan:	Number of available Capture channels.  Default is 0.
     24
     25[1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
     26[2] Documentation/devicetree/bindings/clock/clock-bindings.txt
     27
     28Example:
     29
     30pwm1: pwm@fe510000 {
     31	compatible = "st,pwm";
     32	reg = <0xfe510000 0x68>;
     33	#pwm-cells = <2>;
     34	pinctrl-names = "default";
     35	pinctrl-0 = <&pinctrl_pwm1_chan0_default
     36		     &pinctrl_pwm1_chan1_default
     37		     &pinctrl_pwm1_chan2_default
     38		     &pinctrl_pwm1_chan3_default>;
     39	clocks = <&clk_sysin>;
     40	clock-names = "pwm";
     41	st,pwm-num-chan = <4>;
     42	st,capture-num-chan = <2>;
     43};