cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pwm-tiecap.yaml (1256B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/pwm/pwm-tiecap.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: TI SOC ECAP based APWM controller
      8
      9maintainers:
     10  - Vignesh R <vigneshr@ti.com>
     11
     12allOf:
     13  - $ref: pwm.yaml#
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - const: ti,am3352-ecap
     19      - items:
     20          - enum:
     21              - ti,da850-ecap
     22              - ti,am4372-ecap
     23              - ti,dra746-ecap
     24              - ti,k2g-ecap
     25              - ti,am654-ecap
     26              - ti,am64-ecap
     27          - const: ti,am3352-ecap
     28
     29  reg:
     30    maxItems: 1
     31
     32  "#pwm-cells":
     33    const: 3
     34    description: |
     35      See pwm.yaml in this directory for a description of the cells format.
     36      The only third cell flag supported by this binding is PWM_POLARITY_INVERTED.
     37
     38  clock-names:
     39    const: fck
     40
     41  clocks:
     42    maxItems: 1
     43
     44  power-domains:
     45    maxItems: 1
     46
     47required:
     48  - compatible
     49  - reg
     50  - clocks
     51  - clock-names
     52
     53additionalProperties: false
     54
     55examples:
     56  - |
     57    ecap0: pwm@48300100 { /* ECAP on am33xx */
     58        compatible = "ti,am3352-ecap";
     59        #pwm-cells = <3>;
     60        reg = <0x48300100 0x80>;
     61        clocks = <&l4ls_gclk>;
     62        clock-names = "fck";
     63    };