cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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regmap.txt (907B)


      1Devicetree binding for regmap
      2
      3Optional properties:
      4
      5   little-endian,
      6   big-endian,
      7   native-endian:	See common-properties.txt for a definition
      8
      9Note:
     10Regmap defaults to little-endian register access on MMIO based
     11devices, this is by far the most common setting. On CPU
     12architectures that typically run big-endian operating systems
     13(e.g. PowerPC), registers can be defined as big-endian and must
     14be marked that way in the devicetree.
     15
     16On SoCs that can be operated in both big-endian and little-endian
     17modes, with a single hardware switch controlling both the endianness
     18of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS
     19chips), "native-endian" is used to allow using the same device tree
     20blob in both cases.
     21
     22Examples:
     23Scenario 1 : a register set in big-endian mode.
     24dev: dev@40031000 {
     25	      compatible = "syscon";
     26	      reg = <0x40031000 0x1000>;
     27	      big-endian;
     28	      ...
     29};