cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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palmas-pmic.txt (2883B)


      1* palmas regulator IP block devicetree bindings
      2
      3The tps659038 for the AM57x class have OTP spins that
      4have different part numbers but the same functionality. There
      5is not a need to add the OTP spins to the palmas driver. The
      6spin devices should use the tps659038 as it's compatible value.
      7This is the list of those devices:
      8tps659037
      9
     10Required properties:
     11- compatible : Should be from the list
     12  ti,twl6035-pmic
     13  ti,twl6036-pmic
     14  ti,twl6037-pmic
     15  ti,tps65913-pmic
     16  ti,tps65914-pmic
     17  ti,tps65917-pmic
     18  ti,tps659038-pmic
     19and also the generic series names
     20  ti,palmas-pmic
     21- interrupts : The interrupt number and the type which can be looked up here:
     22	       arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h
     23- interrupts-name: The names of the individual interrupts.
     24
     25Optional properties:
     26- ti,ldo6-vibrator : ldo6 is in vibrator mode
     27
     28Optional nodes:
     29- regulators : Must contain a sub-node per regulator from the list below.
     30	       Each sub-node should contain the constraints and initialization
     31	       information for that regulator. See regulator.txt for a
     32	       description of standard properties for these sub-nodes.
     33	       Additional custom properties  are listed below.
     34
     35	       For ti,palmas-pmic - smps12, smps123, smps3 depending on OTP,
     36	       smps45, smps457, smps7 depending on variant, smps6, smps[8-9],
     37	       smps10_out2, smps10_out1, ldo[1-9], ldoln, ldousb.
     38
     39	       Optional sub-node properties:
     40	       ti,warm-reset - maintain voltage during warm reset(boolean)
     41	       ti,roof-floor - This takes as optional argument on platform supporting
     42	       the rail from desired external control. If there is no argument then
     43	       it will be assume that it is controlled by NSLEEP pin.
     44	       The valid value for external pins are:
     45			ENABLE1 then 1,
     46			ENABLE2 then 2 or
     47			NSLEEP then 3.
     48	       ti,mode-sleep - mode to adopt in pmic sleep 0 - off, 1 - auto,
     49	       2 - eco, 3 - forced pwm
     50	       ti,smps-range - OTP has the wrong range set for the hardware so override
     51	       0 - low range, 1 - high range.
     52
     53- ti,system-power-controller: Telling whether or not this pmic is controlling
     54			      the system power.
     55
     56Example:
     57
     58#include <dt-bindings/interrupt-controller/irq.h>
     59
     60pmic {
     61	compatible = "ti,twl6035-pmic", "ti,palmas-pmic";
     62	interrupt-parent = <&palmas>;
     63	interrupts = <14 IRQ_TYPE_NONE>;
     64	interrupts-name = "short-irq";
     65
     66	ti,ldo6-vibrator;
     67
     68	ti,system-power-controller;
     69
     70	regulators {
     71		smps12_reg : smps12 {
     72			regulator-name = "smps12";
     73			regulator-min-microvolt = < 600000>;
     74			regulator-max-microvolt = <1500000>;
     75			regulator-always-on;
     76			regulator-boot-on;
     77			ti,warm-reset;
     78			ti,roof-floor = <1>; /* ENABLE1 control */
     79			ti,mode-sleep = <0>;
     80			ti,smps-range = <1>;
     81		};
     82
     83		ldo1_reg: ldo1 {
     84			regulator-name = "ldo1";
     85			regulator-min-microvolt = <2800000>;
     86			regulator-max-microvolt = <2800000>;
     87		};
     88	};
     89};