cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ingenic,vpu.yaml (1706B)

      1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: "http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#"
      5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
      6
      7title: Ingenic Video Processing Unit bindings
      8
      9description:
     10  Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from
     11  Ingenic is a second Xburst MIPS CPU very similar to the main core.
     12  This document describes the devicetree bindings for this auxiliary
     13  processor.
     14
     15maintainers:
     16  - Paul Cercueil <paul@crapouillou.net>
     17
     18properties:
     19  compatible:
     20    const: ingenic,jz4770-vpu-rproc
     21
     22  reg:
     23    items:
     24      - description: aux registers
     25      - description: tcsm0 registers
     26      - description: tcsm1 registers
     27      - description: sram registers
     28
     29  reg-names:
     30    items:
     31      - const: aux
     32      - const: tcsm0
     33      - const: tcsm1
     34      - const: sram
     35
     36  clocks:
     37    items:
     38      - description: aux clock
     39      - description: vpu clock
     40
     41  clock-names:
     42    items:
     43      - const: aux
     44      - const: vpu
     45
     46  interrupts:
     47    maxItems: 1
     48
     49required:
     50  - compatible
     51  - reg
     52  - reg-names
     53  - clocks
     54  - clock-names
     55  - interrupts
     56
     57additionalProperties: false
     58
     59examples:
     60  - |
     61    #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
     62
     63    vpu: video-decoder@132a0000 {
     64      compatible = "ingenic,jz4770-vpu-rproc";
     65
     66      reg = <0x132a0000 0x20>, /* AUX */
     67            <0x132b0000 0x4000>, /* TCSM0 */
     68            <0x132c0000 0xc000>, /* TCSM1 */
     69            <0x132f0000 0x7000>; /* SRAM */
     70      reg-names = "aux", "tcsm0", "tcsm1", "sram";
     71
     72      clocks = <&cgu JZ4770_CLK_AUX>, <&cgu JZ4770_CLK_VPU>;
     73      clock-names = "aux", "vpu";
     74
     75      interrupt-parent = <&cpuintc>;
     76      interrupts = <3>;
     77    };