cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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nuvoton,npcm750-reset.yaml (1132B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Nuvoton NPCM Reset controller
      8
      9maintainers:
     10  - Tomer Maimon <tmaimon77@gmail.com>
     11
     12properties:
     13  compatible:
     14    const: nuvoton,npcm750-reset
     15
     16  reg:
     17    maxItems: 1
     18
     19  '#reset-cells':
     20    const: 2
     21
     22  nuvoton,sw-reset-number:
     23    $ref: /schemas/types.yaml#/definitions/uint32
     24    minimum: 1
     25    maximum: 4
     26    description: |
     27      Contains the software reset number to restart the SoC.
     28      If not specified, software reset is disabled.
     29
     30required:
     31  - compatible
     32  - reg
     33  - '#reset-cells'
     34
     35additionalProperties: false
     36
     37examples:
     38  - |
     39    #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
     40    rstc: rstc@f0801000 {
     41        compatible = "nuvoton,npcm750-reset";
     42        reg = <0xf0801000 0x70>;
     43        #reset-cells = <2>;
     44        nuvoton,sw-reset-number = <2>;
     45    };
     46
     47    // Specifying reset lines connected to IP NPCM7XX modules
     48    spi0: spi {
     49        resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1>;
     50    };