cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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faraday,ftrtc010.yaml (1358B)

      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/rtc/faraday,ftrtc010.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Faraday Technology FTRTC010 Real Time Clock
      8
      9maintainers:
     10  - Linus Walleij <linus.walleij@linaro.org>
     11
     12description: |
     13  This RTC appears in for example the Storlink Gemini family of SoCs.
     14
     15properties:
     16  compatible:
     17    oneOf:
     18      - const: faraday,ftrtc010
     19      - items:
     20          - const: cortina,gemini-rtc
     21          - const: faraday,ftrtc010
     22
     23  resets:
     24    maxItems: 1
     25
     26  reg:
     27    maxItems: 1
     28
     29  interrupts:
     30    maxItems: 1
     31
     32  clocks:
     33    items:
     34      - description: PCLK clocks
     35      - description: EXTCLK clocks. Faraday calls it CLK1HZ and says the clock
     36          should be 1 Hz, but implementers actually seem to choose different
     37          clocks here, like Cortina who chose 32768 Hz (a typical low-power clock).
     38
     39  clock-names:
     40    items:
     41      - const: "PCLK"
     42      - const: "EXTCLK"
     43
     44required:
     45  - compatible
     46
     47additionalProperties: false
     48
     49examples:
     50  - |
     51    #include <dt-bindings/interrupt-controller/irq.h>
     52    rtc@45000000 {
     53      compatible = "cortina,gemini-rtc", "faraday,ftrtc010";
     54      reg = <0x45000000 0x100>;
     55      interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
     56      clocks = <&foo 0>, <&foo 1>;
     57      clock-names = "PCLK", "EXTCLK";
     58    };