cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

isil,isl12057.txt (2179B)


      1Intersil ISL12057 I2C RTC/Alarm chip
      2
      3ISL12057 is a trivial I2C device (it has simple device tree bindings,
      4consisting of a compatible field, an address and possibly an interrupt
      5line).
      6
      7Nonetheless, it also supports an option boolean property
      8("wakeup-source") to handle the specific use-case found
      9on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
     10and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
     11(associated with the alarm supported by the driver) is not connected
     12to the SoC but to a PMIC. It allows the device to be powered up when
     13RTC alarm rings. In order to mark the device has a wakeup source and
     14get access to the 'wakealarm' sysfs entry, this specific property can
     15be set when the IRQ#2 pin of the chip is not connected to the SoC but
     16can wake up the device.
     17
     18Required properties supported by the device:
     19
     20 - "compatible": must be "isil,isl12057"
     21 - "reg": I2C bus address of the device
     22
     23Optional properties:
     24
     25 - "wakeup-source": mark the chip as a wakeup source, independently of
     26    the availability of an IRQ line connected to the SoC.
     27
     28
     29Example isl12057 node without IRQ#2 pin connected (no alarm support):
     30
     31	isl12057: isl12057@68 {
     32		compatible = "isil,isl12057";
     33		reg = <0x68>;
     34	};
     35
     36
     37Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
     38that the pinctrl-related properties below are given for completeness and
     39may not be required or may be different depending on your system or
     40SoC, and the main function of the MPP used as IRQ line, i.e.
     41"interrupt-parent" and "interrupts" are usually sufficient):
     42
     43		    pinctrl {
     44				...
     45
     46				rtc_alarm_pin: rtc_alarm_pin {
     47					marvell,pins = "mpp6";
     48					marvell,function = "gpio";
     49				};
     50
     51				...
     52
     53		    };
     54
     55	...
     56
     57	isl12057: isl12057@68 {
     58		compatible = "isil,isl12057";
     59		reg = <0x68>;
     60		pinctrl-0 = <&rtc_alarm_pin>;
     61		pinctrl-names = "default";
     62		interrupt-parent = <&gpio0>;
     63		interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
     64	};
     65
     66
     67Example isl12057 node without IRQ#2 pin connected to the SoC but to a
     68PMIC, allowing the device to be started based on configured alarm:
     69
     70	isl12057: isl12057@68 {
     71		compatible = "isil,isl12057";
     72		reg = <0x68>;
     73		wakeup-source;
     74	};