cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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renesas,sh-rtc.yaml (1947B)

      1# SPDX-License-Identifier: GPL-2.0
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/rtc/renesas,sh-rtc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: Real Time Clock for Renesas SH and ARM SoCs
      8
      9maintainers:
     10  - Chris Brandt <chris.brandt@renesas.com>
     11  - Geert Uytterhoeven <geert+renesas@glider.be>
     12
     13properties:
     14  compatible:
     15    items:
     16      - const: renesas,r7s72100-rtc  # RZ/A1H
     17      - const: renesas,sh-rtc
     18
     19  reg:
     20    maxItems: 1
     21
     22  interrupts:
     23    maxItems: 3
     24
     25  interrupt-names:
     26    items:
     27      - const: alarm
     28      - const: period
     29      - const: carry
     30
     31  clocks:
     32    # The functional clock source for the RTC controller must be listed
     33    # first (if it exists). Additionally, potential clock counting sources
     34    # are to be listed.
     35    minItems: 1
     36    maxItems: 4
     37
     38  clock-names:
     39    # The functional clock must be labeled as "fck". Other clocks
     40    # may be named in accordance to the SoC hardware manuals.
     41    minItems: 1
     42    maxItems: 4
     43    items:
     44      enum: [ fck, rtc_x1, rtc_x3, extal ]
     45
     46  power-domains:
     47    maxItems: 1
     48
     49required:
     50  - compatible
     51  - reg
     52  - interrupts
     53  - interrupt-names
     54  - clocks
     55  - clock-names
     56  - power-domains
     57
     58additionalProperties: false
     59
     60examples:
     61  - |
     62    #include <dt-bindings/clock/r7s72100-clock.h>
     63    #include <dt-bindings/interrupt-controller/arm-gic.h>
     64    #include <dt-bindings/interrupt-controller/irq.h>
     65
     66    rtc: rtc@fcff1000 {
     67        compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
     68        reg = <0xfcff1000 0x2e>;
     69        interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING>,
     70                     <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>,
     71                     <GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
     72        interrupt-names = "alarm", "period", "carry";
     73        clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
     74                 <&rtc_x3_clk>, <&extal_clk>;
     75        power-domains = <&cpg_clocks>;
     76        clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
     77    };