cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

st,stm32-rtc.yaml (2947B)


      1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
      2%YAML 1.2
      3---
      4$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
      5$schema: http://devicetree.org/meta-schemas/core.yaml#
      6
      7title: STMicroelectronics STM32 Real Time Clock Bindings
      8
      9maintainers:
     10  - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
     11
     12properties:
     13  compatible:
     14    enum:
     15      - st,stm32-rtc
     16      - st,stm32h7-rtc
     17      - st,stm32mp1-rtc
     18
     19  reg:
     20    maxItems: 1
     21
     22  clocks:
     23    minItems: 1
     24    maxItems: 2
     25
     26  clock-names:
     27    items:
     28      - const: pclk
     29      - const: rtc_ck
     30
     31  interrupts:
     32    maxItems: 1
     33
     34  st,syscfg:
     35    $ref: "/schemas/types.yaml#/definitions/phandle-array"
     36    items:
     37      minItems: 3
     38      maxItems: 3
     39    description: |
     40      Phandle/offset/mask triplet. The phandle to pwrcfg used to
     41      access control register at offset, and change the dbp (Disable Backup
     42      Protection) bit represented by the mask, mandatory to disable/enable backup
     43      domain (RTC registers) write protection.
     44
     45  assigned-clocks:
     46    description: |
     47      override default rtc_ck parent clock reference to the rtc_ck clock entry
     48    maxItems: 1
     49
     50  assigned-clock-parents:
     51    description: |
     52      override default rtc_ck parent clock phandle of the new parent clock of rtc_ck
     53    maxItems: 1
     54
     55allOf:
     56  - if:
     57      properties:
     58        compatible:
     59          contains:
     60            const: st,stm32-rtc
     61
     62    then:
     63      properties:
     64        clocks:
     65          minItems: 1
     66          maxItems: 1
     67
     68        clock-names: false
     69
     70      required:
     71        - st,syscfg
     72
     73  - if:
     74      properties:
     75        compatible:
     76          contains:
     77            const: st,stm32h7-rtc
     78
     79    then:
     80      properties:
     81        clocks:
     82          minItems: 2
     83          maxItems: 2
     84
     85      required:
     86        - clock-names
     87        - st,syscfg
     88
     89  - if:
     90      properties:
     91        compatible:
     92          contains:
     93            const: st,stm32mp1-rtc
     94
     95    then:
     96      properties:
     97        clocks:
     98          minItems: 2
     99          maxItems: 2
    100
    101        assigned-clocks: false
    102        assigned-clock-parents: false
    103
    104      required:
    105        - clock-names
    106
    107required:
    108  - compatible
    109  - reg
    110  - clocks
    111  - interrupts
    112
    113additionalProperties: false
    114
    115examples:
    116  - |
    117    #include <dt-bindings/mfd/stm32f4-rcc.h>
    118    #include <dt-bindings/clock/stm32fx-clock.h>
    119    rtc@40002800 {
    120      compatible = "st,stm32-rtc";
    121      reg = <0x40002800 0x400>;
    122      clocks = <&rcc 1 CLK_RTC>;
    123      assigned-clocks = <&rcc 1 CLK_RTC>;
    124      assigned-clock-parents = <&rcc 1 CLK_LSE>;
    125      interrupt-parent = <&exti>;
    126      interrupts = <17 1>;
    127      st,syscfg = <&pwrcfg 0x00 0x100>;
    128    };
    129
    130  - |
    131    #include <dt-bindings/interrupt-controller/arm-gic.h>
    132    #include <dt-bindings/clock/stm32mp1-clks.h>
    133    rtc@5c004000 {
    134      compatible = "st,stm32mp1-rtc";
    135      reg = <0x5c004000 0x400>;
    136      clocks = <&rcc RTCAPB>, <&rcc RTC>;
    137      clock-names = "pclk", "rtc_ck";
    138      interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
    139    };
    140
    141...