cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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st33zp24-i2c.txt (995B)

      1* STMicroelectronics SAS. ST33ZP24 TPM SoC
      2
      3Required properties:
      4- compatible: Should be "st,st33zp24-i2c".
      5- clock-frequency: I²C work frequency.
      6- reg: address on the bus
      7
      8Optional ST33ZP24 Properties:
      9- interrupts: GPIO interrupt to which the chip is connected
     10- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state.
     11If set, power must be present when the platform is going into sleep/hibernate mode.
     12
     13Optional SoC Specific Properties:
     14- pinctrl-names: Contains only one value - "default".
     15- pintctrl-0: Specifies the pin control groups used for this controller.
     16
     17Example (for ARM-based BeagleBoard xM with ST33ZP24 on I2C2):
     18
     19&i2c2 {
     20
     21
     22        st33zp24: st33zp24@13 {
     23
     24                compatible = "st,st33zp24-i2c";
     25
     26                reg = <0x13>;
     27                clock-frequency = <400000>;
     28
     29                interrupt-parent = <&gpio5>;
     30                interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
     31
     32                lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>;
     33        };
     34};