cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tpm_tis_mmio.txt (861B)


      1Trusted Computing Group MMIO Trusted Platform Module
      2
      3The TCG defines multi vendor standard for accessing a TPM chip, this
      4is the standard protocol defined to access the TPM via MMIO. Typically
      5this interface will be implemented over Intel's LPC bus.
      6
      7Refer to the 'TCG PC Client Specific TPM Interface Specification (TIS)' TCG
      8publication for the specification.
      9
     10Required properties:
     11
     12- compatible: should contain a string below for the chip, followed by
     13              "tcg,tpm-tis-mmio". Valid chip strings are:
     14	          * "atmel,at97sc3204"
     15- reg: The location of the MMIO registers, should be at least 0x5000 bytes
     16- interrupts: An optional interrupt indicating command completion.
     17
     18Example:
     19
     20	tpm_tis@90000 {
     21				compatible = "atmel,at97sc3204", "tcg,tpm-tis-mmio";
     22				reg = <0x90000 0x5000>;
     23				interrupt-parent = <&EIC0>;
     24				interrupts = <1 2>;
     25	};