cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tpm_tis_spi.txt (564B)

      1Required properties:
      2- compatible: should be one of the following
      3    "st,st33htpm-spi"
      4    "infineon,slb9670"
      5    "tcg,tpm_tis-spi"
      6- spi-max-frequency: Maximum SPI frequency (depends on TPMs).
      7
      8Optional SoC Specific Properties:
      9- pinctrl-names: Contains only one value - "default".
     10- pintctrl-0: Specifies the pin control groups used for this controller.
     11
     12Example (for ARM-based BeagleBoard xM with TPM_TIS on SPI4):
     13
     14&mcspi4 {
     15
     16
     17        tpm_tis@0 {
     18
     19                compatible = "tcg,tpm_tis-spi";
     20
     21                spi-max-frequency = <10000000>;
     22        };
     23};