cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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digicolor-usart.txt (806B)


      1Binding for Conexant Digicolor USART
      2
      3Note: this binding is only applicable for using the USART peripheral as
      4UART. USART also support synchronous serial protocols like SPI and I2S. Use
      5the binding that matches the wiring of your system.
      6
      7Required properties:
      8- compatible : should be "cnxt,cx92755-usart".
      9- reg: Should contain USART controller registers location and length.
     10- interrupts: Should contain a single USART controller interrupt.
     11- clocks: Must contain phandles to the USART clock
     12  See ../clocks/clock-bindings.txt for details.
     13
     14Note: Each UART port should have an alias correctly numbered
     15in "aliases" node.
     16
     17Example:
     18	aliases {
     19		serial0 = &uart0;
     20	};
     21
     22	uart0: uart@f0000740 {
     23		compatible = "cnxt,cx92755-usart";
     24		reg = <0xf0000740 0x20>;
     25		clocks = <&main_clk>;
     26		interrupts = <44>;
     27	};